Commit Graph

11 Commits

Author SHA1 Message Date
Evan Cheng
9085f98b32 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 07:28:01 +00:00
Dan Gohman
9f23dee08c Start function numbering at 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 16:29:15 +00:00
Evan Cheng
fac4f1f181 Enable machine cse pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98132 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10 03:07:41 +00:00
Evan Cheng
c26abd9487 Enable hoisting load from constant memories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:31:34 +00:00
Evan Cheng
9b82425cb0 Also CSE non-pic load from constant pools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:10:27 +00:00
Evan Cheng
d457e6e9a5 Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
except it doesn't care if the definitions' virtual registers differ. This is
  used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
  Since pc relative constantpool entries are always different, this requires it
  it check if the values can actually the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Evan Cheng
b9803a8fa6 - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
load of a GV from constantpool and then add pc. It allows the code sequence to
  be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
  instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
  to this pass. This is done before post regalloc scheduling to allow the
  scheduler to proper schedule these instructions. It also allow them to be
  if-converted and shrunk by later passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Evan Cheng
ad95ff9fab Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 00:42:33 +00:00
Evan Cheng
de17fb6e4d Use cbz and cbnz instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 23:46:45 +00:00
Evan Cheng
9eda68988e It's safe to remat t2LDRpci; Add PseudoSourceValue to load / store's to enable more machine licm. More changes coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85643 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 03:39:36 +00:00