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Commit Graph

23046 Commits

Author SHA1 Message Date
Erik Verbruggen
0638609d66 Fix crash in PRE.
After r203553 overflow intrinsics and their non-intrinsic (normal)
instruction get hashed to the same value. This patch prevents PRE from
moving an instruction into a predecessor block, and trying to add a phi
node that gets two different types (the intrinsic result and the
non-intrinsic result), resulting in a failing assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203574 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 15:07:32 +00:00
Tim Northover
ca396e391e IR: add a second ordering operand to cmpxhg for failure
The syntax for "cmpxchg" should now look something like:

	cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic

where the second ordering argument gives the required semantics in the case
that no exchange takes place. It should be no stronger than the first ordering
constraint and cannot be either "release" or "acq_rel" (since no store will
have taken place).

rdar://problem/15996804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203559 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 10:48:52 +00:00
Erik Verbruggen
cf5240642b GVN: merge overflow intrinsics with non-overflow instructions.
When an overflow intrinsic is followed by a non-overflow instruction,
replace the latter with an extract. For example:

  %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
  %sadd3 = add i32 %a, %b

Here the add statement will be replaced by an extract.

When an overflow intrinsic follows a non-overflow instruction, a clone
of the intrinsic is inserted before the normal instruction, which makes
it the same as the previous case. Subsequent runs of GVN can then clean
up the duplicate instructions and insert the extract.

This fixes PR8817.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203553 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 09:36:48 +00:00
Jim Grosbach
7a37166a7a X86: Enable ISel of 16-bit MOVBE instructions.
When the MOVBE instructions are available, use them for 16-bit endian
swapping as well as for 32 and 64 bit.

The patterns were already present on the instructions, but weren't being
matched because the operation was unconditionally marked to 'Expand.'
Change that to be conditional on whether the MOVBE instructions are
available. Use 'rolw' to implement the in-register version (32 and 64
bit have the dedicated 'bswap' instruction for that).

Patch by Louis Gerbarg <lgg@apple.com>.

rdar://15479984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203524 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 00:44:14 +00:00
Matt Arsenault
53131629dc Fix undefined behavior in vector shift tests.
These were all shifting the same amount as the bitwidth.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203519 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 00:01:41 +00:00
Duncan P. N. Exon Smith
f5d17528ee Module: Don't rename in getOrInsertFunction()
During LTO, user-supplied definitions of C library functions often
exist.  -instcombine uses Module::getOrInsertFunction() to get a handle
on library functions (e.g., @puts, when optimizing @printf).

Previously, Module::getOrInsertFunction() would rename any matching
functions with local linkage, and create a new declaration.  In LTO,
this is the opposite of desired behaviour, as it skips by the
user-supplied version of the library function and creates a new
undefined reference which the linker often cannot resolve.

After some discussing with Rafael on the list, it looks like it's
undesired behaviour.  If a consumer actually *needs* this behaviour, we
should add new API with a more explicit name.

I added two testcases: one specifically for the -instcombine behaviour
and one for the LTO flow.

<rdar://problem/16165191>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203513 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 23:42:28 +00:00
Raul E. Silvera
6df2b69098 When analyzing vectors of element type that require legalization,
the legalization cost must be included to get an accurate
estimation of the total cost of the scalarized vector.
The inaccurate cost triggered unprofitable SLP vectorization on
32-bit X86.

Summary:
Include legalization overhead when computing scalarization cost

Reviewers: hfinkel, nadav

CC: chandlerc, rnk, llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2992

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 22:59:13 +00:00
Diego Novillo
87393cfd6b Use discriminator information in sample profiles.
Summary:
When the sample profiles include discriminator information,
use the discriminator values to distinguish instruction weights
in different basic blocks.

This modifies the BodySamples mapping to map <line, discriminator> pairs
to weights. Instructions on the same line but different blocks, will
use different discriminator values. This, in turn, means that the blocks
may have different weights.

Other changes in this patch:

- Add tests for positive values of line offset, discriminator and samples.
- Change data types from uint32_t to unsigned and int and do additional
  validation.

Reviewers: chandlerc

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203508 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 22:41:28 +00:00
Benjamin Kramer
8da0b7358d MemCpyOpt: When merging memsets also merge the trivial case of two memsets with the same destination.
The testcase is from PR19092, but I think the bug described there is actually a clang issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203489 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 21:05:13 +00:00
Evan Cheng
d89b0f200c For functions with ARM target specific calling convention, when simplify-libcall
optimize a call to a llvm intrinsic to something that invovles a call to a C
library call, make sure it sets the right calling convention on the call.

e.g.
extern double pow(double, double);
double t(double x) {
  return pow(10, x);
}

Compiles to something like this for AAPCS-VFP:
define arm_aapcs_vfpcc double @t(double %x)  {
entry:
  %0 = call double @llvm.pow.f64(double 1.000000e+01, double %x)
  ret double %0
}

declare double @llvm.pow.f64(double, double) 

Simplify libcall (part of instcombine) will turn the above into:
define arm_aapcs_vfpcc double @t(double %x)  {
entry:
  %__exp10 = call double @__exp10(double %x) 
  ret double %__exp10
}

declare double @__exp10(double)

The pre-instcombine code works because calls to LLVM builtins are special.
Instruction selection will chose the right calling convention for the call.
However, the code after instcombine is wrong. The call to __exp10 will use
the C calling convention.

I can think of 3 options to fix this.

1. Make "C" calling convention just work since the target should know what CC
   is being used.

   This doesn't work because each function can use different CC with the "pcs"
   attribute.

2. Have Clang add the right CC keyword on the calls to LLVM builtin.

   This will work but it doesn't match the LLVM IR specification which states
   these are "Standard C Library Intrinsics".

3. Fix simplify libcall so the resulting calls to the C routines will have the
   proper CC keyword. e.g.
   %__exp10 = call arm_aapcs_vfpcc double @__exp10(double %x) 

   This works and is the solution I implemented here.

Both solutions  and  would work. After carefully considering the pros and
cons, I decided to implement  for the following reasons.

1. It doesn't change the "spec" of the intrinsics.
2. It's a self-contained fix.

There are a couple of potential downsides.
1. There could be other places in the optimizer that is broken in the same way
   that's not addressed by this.
2. There could be other calling conventions that need to be propagated by
   simplify-libcall that's not handled.

But for now, this is the fix that I'm most comfortable with.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203488 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 20:49:45 +00:00
Eli Bendersky
428b609de3 Followup to r203483 - add test.
[forgot to 'svn add' before committing r203483]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 20:36:04 +00:00
Sasa Stankovic
754aaee387 [mips] Implement NaCl sandboxing of loads, stores and SP changes:
* Add masking instructions before loads and stores (in MC layer).
  * Add masking instructions after SP changes (in MC layer).
  * Forbid loads, stores and SP changes in delay slots (in MI layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D2904


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 20:34:23 +00:00
Adam Nemet
866797dc2c [bugpoint] Add testcase for r203343.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203472 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 16:58:54 +00:00
Reed Kotler
017bc0fca6 Fix regression with -O0 for mips .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203469 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 16:31:25 +00:00
JF Bastien
c869887dde Add test for LinkModules warning on triple, modified by r203009. Datalayout is already tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203468 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 15:54:49 +00:00
Matheus Almeida
ffb6f6ed2a [mips] Assembly parser must invoke the target streamer to handle .set reorder macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 13:21:10 +00:00
Tim Northover
8ca089df49 AArch64: fix LowerCONCAT_VECTORS for new CodeGen.
The function was making too many assumptions about its input:

1. The NEON_VDUP optimisation was far too aggressive, assuming (I
think) that the input would always be BUILD_VECTOR.

2. We were treating most unknown concats as legal (by returning Op
rather than SDValue()). I think only concats of pairs of vectors are
actually legal.

http://llvm.org/PR19094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203450 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 09:34:07 +00:00
Venkatraman Govindaraju
08da01c741 [Sparc] Add support for decoding 'swap' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-09 23:32:07 +00:00
NAKAMURA Takumi
e086782817 Revert r203230, "CodeGenPrep: sink extends of illegal types into use block."
It choked i686 stage2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-09 11:01:07 +00:00
David Majnemer
39a09d2b7c IR: Change inalloca's grammar a bit
The grammar for LLVM IR is not well specified in any document but seems
to obey the following rules:

 - Attributes which have parenthesized arguments are never preceded by
   commas.  This form of attribute is the only one which ever has
   optional arguments.  However, not all of these attributes support
   optional arguments: 'thread_local' supports an optional argument but
   'addrspace' does not.  Interestingly, 'addrspace' is documented as
   being a "qualifier".  What constitutes a qualifier?  I cannot find a
   definition.

 - Some attributes use a space between the keyword and the value.
   Examples of this form are 'align' and 'section'.  These are always
   preceded by a comma.

 - Otherwise, the attribute has no argument.  These attributes do not
   have a preceding comma.

Sometimes an attribute goes before the instruction, between the
instruction and it's type, or after it's type.  'atomicrmw' has
'volatile' between the instruction and the type while 'call' has 'tail'
preceding the instruction.

With all this in mind, it seems most consistent for 'inalloca' on an
'inalloca' instruction to occur before between the instruction and the
type.  Unlike the current formulation, there would be no preceding
comma.  The combination 'alloca inalloca' doesn't look particularly
appetizing, perhaps a better spelling of 'inalloca' is down the road.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203376 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-09 06:41:58 +00:00
Adam Nemet
b033b03c23 Update comment from r203315 based on review
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-08 21:51:55 +00:00
David Blaikie
50b59c77e0 DebugInfo: further improvements to test following up on r203329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-08 02:45:53 +00:00
David Blaikie
5c31033dda DebugInfo: Fix test fallout from r203323
Will fix this harder in a moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-08 01:32:51 +00:00
David Blaikie
5af111c380 DebugInfo: Use DW_FORM_data4 for DW_AT_high_pc in DW_TAG_lexical_blocks
Suggested by Adrian Prantl in code review for r203187

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-08 00:58:20 +00:00
Eric Christopher
b1c8844101 Add support for hashing location information for CU level hashes.
Add a testcase based on sret.cpp where we can now hash the entire
compile unit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203319 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-08 00:29:41 +00:00
Adam Nemet
316d3e3085 [DAGCombiner] Recognize another rotation idiom
This is the new idiom:

  x<<(y&31) | x>>((0-y)&31)

which is recognized as:

  x ROTL (y&31)

The change refines matchRotateSub.  In
Neg & (OpSize - 1) == (OpSize - Pos) & (OpSize - 1), if Pos is
Pos' & (OpSize - 1) we can just use Pos' instead of Pos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203315 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 23:56:28 +00:00
Arnold Schwaighofer
aa5b17b359 ISel: Make VSELECT selection terminate in cases where the condition type has to
be split and the result type widened.

When the condition of a vselect has to be split it makes no sense widening the
vselect and thereby widening the condition. We end up in an endless loop of
widening (vselect result type) and splitting (condition mask type) doing this.
Instead, split both the condition and the vselect and widen the result.

I ran this over the test suite with i686 and mattr=+sse and saw no regressions.

Fixes PR18036.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203311 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 23:25:55 +00:00
Adrian Prantl
bd86fbe0d7 Remove unnecessary test for Darwin and update testcase to be a little less
horrible/fragile.
rdar://problem/16264854

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203309 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 23:07:21 +00:00
Sasa Stankovic
fa14948a11 Moved test file from test/MC/Mips to test/CodeGen/Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203298 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 22:08:46 +00:00
David Blaikie
9623e46f00 DebugInfo: Use DW_FORM_data4 for DW_AT_high_pc in inlined functions
Suggested by Adrian Prantl in code review for r203187.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203296 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 22:00:56 +00:00
David Blaikie
0afacf185d DebugInfo: Update test to cover linux (with a FIXME...) too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203295 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 22:00:49 +00:00
Tom Stellard
6cadd406cc R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCC
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 20:12:39 +00:00
Tom Stellard
7e06370873 R600/SI: Custom lower i1 stores
These are sometimes created by the shrink to boolean optimization in the
globalopt pass.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203280 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 20:12:33 +00:00
David Blaikie
f7952d3a5f DebugInfo: Restrict DW_AT_high_pc encoding as data4 offset to DWARF 4 as per spec
Code review feedback to r203187 from Oliver Stannard. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203256 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 18:04:24 +00:00
Duncan P. N. Exon Smith
ac4c4a8844 ARM: Make .unreq directives case-insensitive
Be case-insensitive when processing .unreq directives.

Patch by Lin Zuojian!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203251 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 16:16:52 +00:00
Tim Northover
fa9e4b52f4 CodeGenPrep: sink extends of illegal types into use block.
This helps the instruction selector to lower an i64 * i64 -> i128
multiplication into a single instruction on targets which support it.

Patch by Manuel Jacob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203230 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 11:04:30 +00:00
Tim Northover
69d2b2aa5a InstCombine: form shuffles from wider range of insert/extractelements
Sequences of insertelement/extractelements are sometimes used to build
vectorsr; this code tries to put them back together into shuffles, but
could only produce a completely uniform shuffle types (<N x T> from two
<N x T> sources).

This should allow shuffles with different numbers of elements on the
input and output sides as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203229 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 10:24:44 +00:00
Rafael Espindola
7d7d99622f Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted:
* A temporary label was created.
* A single PROLOG_LABEL was created with it.
* A few MCCFIInstructions were created with the same label.

The semantics were that the cfi instructions were mapped to the PROLOG_LABEL
via the temporary label. The output position was that of the PROLOG_LABEL.
The temporary label itself was used only for doing the mapping.

The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to
one by holding an index into the CFI instructions of this function.

I did consider removing MMI.getFrameInstructions completelly and having
CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non
trivial constructors and destructors and are somewhat big, so the this setup
is probably better.

The net result is that we don't create temporary labels that are never used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203204 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 06:08:31 +00:00
Karthik Bhat
70957b9c55 Allow constant folding of round function whenever feasible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203198 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 04:36:21 +00:00
David Blaikie
4b102527fa DebugInfo: Limit r203187 to non-darwin as lldb can't handle this yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203192 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 02:19:41 +00:00
David Blaikie
34fa5640b8 DebugInfo: Emit DW_TAG_subprogram's DW_AT_high_pc as an offset from the low_pc
This removes a relocation from each subprogram, reducing link times,
etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 01:30:55 +00:00
David Blaikie
e2bb4f48ad DebugInfo: Refactor test to not rely on fixed DIE offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203186 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 01:19:31 +00:00
David Blaikie
63557bfbfb DebugInfo: Improve test to not depend on the specific naming of temporary symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203184 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 00:23:38 +00:00
Rafael Espindola
b52d0c0d74 Remove shouldEmitUsedDirectiveFor.
Clang now uses llvm.compiler.used for these cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203174 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 22:47:08 +00:00
Rafael Espindola
e7147c1b57 Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203173 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 22:21:43 +00:00
Andrea Di Biagio
e54158504f [X86] Teach the DAGCombiner how to fold a OR of two shufflevector nodes.
This patch teaches the DAGCombiner how to fold a binary OR between two
shufflevector into a single shuffle vector when possible.

The rules are:
  1. fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf A, B, Mask1)
  2. fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf B, A, Mask2)

The DAGCombiner can take advantage of the fact that OR is commutative and
compute two possible shuffle masks (Mask1 and Mask2) for the resulting
shuffle node.

Before folding a dag according to either rule 1 or 2, DAGCombiner verifies
that the resulting shuffle mask is legal for the target.
DAGCombiner would firstly try to fold according to 1.; If not possible
then it will try to fold according to 2.
If both Mask1 and Mask2 are illegal then we conservatively don't fold
the OR instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203156 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 20:19:52 +00:00
Rafael Espindola
abb1fadc79 Fix the printing of n_type.
Despite the name, n_type contains the type of the symbol, but also if it is
extern or private extern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203154 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 20:13:41 +00:00
Matt Arsenault
161e3a80b2 R600: Fix extloads from i8 / i16 to i64.
This appears to only be working for global loads. Private
and local break for other reasons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 17:34:12 +00:00
Matt Arsenault
b4cd160bb9 R600/SI: Expand selects on vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203134 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 17:34:03 +00:00
Matt Arsenault
38c18efe41 Teach lint about address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203132 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 17:33:55 +00:00