- Add patterns to match the following MMX builtins:
* __builtin_ia32_vec_init_v8qi
* __builtin_ia32_vec_init_v4hi
* __builtin_ia32_vec_init_v2si
* __builtin_ia32_vec_ext_v2si
These builtins do not correspond to a single MMX instruction. They will have
to be lowered -- most likely in the back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112881 91177308-0d34-0410-b5e6-96231b3b80d8
moment, as there's a testcase that uses it and expects it
to be subject to optimizations; we won't be doing that.
Some adjustments based on feedback from Bill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112754 91177308-0d34-0410-b5e6-96231b3b80d8
available in normal llvm operators. We aren't going to
use those for MMX any more because it's unsafe for the
optimizers to synthesize new MMX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112685 91177308-0d34-0410-b5e6-96231b3b80d8
as soon as we properly codegen the simple vector operations in clang, remove the
unnecessary builti-ins/intrinsics from clang and llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110094 91177308-0d34-0410-b5e6-96231b3b80d8
shifts and null vectors. Autoupgrade these to what we'd lower them to.
Add a testcase to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101851 91177308-0d34-0410-b5e6-96231b3b80d8
aes instead of sse4.2. Add a brief todo for a subtarget flag and rework
the aeskeygenassist instruction to more closely match the docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100078 91177308-0d34-0410-b5e6-96231b3b80d8
Rewrite the pmulld patterns, and make sure that they fold in loads of
arguments into the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99910 91177308-0d34-0410-b5e6-96231b3b80d8
--- Reverse-merging r99440 into '.':
U test/MC/AsmParser/X86/x86_32-bit_cat.s
U test/MC/AsmParser/X86/x86_32-encoding.s
U include/llvm/IntrinsicsX86.td
U include/llvm/CodeGen/SelectionDAGNodes.h
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
"parameter" types. An intrinsic can now return a multiple return values like
this:
def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
[LLVMMatchType<0>, LLVMMatchType<0>]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
the same pattern as roundpd/roundps, the Intel compiler
builtins do not: rounds* has an extra operand. Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
a constant vector ("{0x123, 0x456}" syntax). The fix is to simplify the
_mm_srli_si128 macro, and move the "* 8" from the macro into the compiler
back-end. I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56944 91177308-0d34-0410-b5e6-96231b3b80d8
