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Author SHA1 Message Date
Benjamin Kramer
0baa94a13b InstCombine: Turn icmp + sext into bitwise/integer ops when the input has only one unknown bit. 
int test1(unsigned x) { return (x&8) ? 0 : -1; }
int test3(unsigned x) { return (x&8) ? -1 : 0; }

before (x86_64):
_test1:
	andl	$8, %edi
	cmpl	$1, %edi
	sbbl	%eax, %eax
	ret
_test3:
	andl	$8, %edi
	cmpl	$1, %edi
	sbbl	%eax, %eax
	notl	%eax
	ret

after:
_test1:
	shrl	$3, %edi
	andl	$1, %edi
	leal	-1(%rdi), %eax
	ret
_test3:
	shll	$28, %edi
	movl	%edi, %eax
	sarl	$31, %eax
	ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128732 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 20:09:10 +00:00
Benjamin Kramer
0a30c42008 InstCombine: Move (sext icmp) transforms into their own method. No intended functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128731 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 20:09:03 +00:00
Evan Cheng
c249e48558 Add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128730 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 19:57:01 +00:00
Evan Cheng
8380c034b6 Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128728 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 19:42:22 +00:00
Oscar Fuentes
c2db19ebf4 Fix assignment of -fPIC to CMAKE_C_FLAGS. Configure llvm-config.in.in 
with the contents of CMAKE_C(XX)_FLAGS too, else `llvm-config
--c(xx)flags' doesn't tell the absolute truth.

This comes from PR9603 and is based on a patch by Ryuta Suzuki!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128727 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 19:36:06 +00:00
Akira Hatanaka
a4485c4964 Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128724 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 18:57:38 +00:00
Johnny Chen
5307da994a Fix LDRi12 immediate operand, which was changed to be the second operand in $addrmode_imm12 => (ops GPR:$base, i32imm:$offsimm). 
rdar://problem/9219356


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 18:26:38 +00:00
Devang Patel
c9d2f0cad3 Update CMakeLists.txt 
Patch by arrowdoger.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 18:03:58 +00:00
Akira Hatanaka
20ada98de8 Add code for analyzing FP branches. Clean up branch Analysis functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 17:39:08 +00:00
Benjamin Kramer
0e3ee43ea0 Initialize HasVMLxForwarding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128709 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 09:20:31 +00:00
Jay Foad
8891ed7ac9 Various Instructions' resizeOperands() methods are only used to grow the 
list of operands. Simplify and rename them accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 08:00:58 +00:00
Evan Cheng
5b76c63f83 Add test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 06:27:25 +00:00
Evan Cheng
df269b9129 FileCheck'ify test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128706 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 03:36:33 +00:00
Duncan Sands
607946533d While testing dragonegg I noticed that isCastable and getCastOpcode 
had gotten out of sync: isCastable didn't think it was possible to
cast the x86_mmx type to anything, while it did think it possible
to cast an i64 to x86_mmx.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 03:34:54 +00:00
Andrew Trick
234823297e Add annotations to tablegen-generated processor itineraries, or replace them with something meaningful. I want to be able to read and debug the generated tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128703 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 02:22:47 +00:00
Andrew Trick
da96cf2029 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128701 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 01:56:55 +00:00
Evan Cheng
8e23e815ad Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs. 
rdar://8911343


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 00:42:02 +00:00
Matt Beaumont-Gay
e3662cca5d Remove unused variables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128692 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-01 00:06:01 +00:00
Jakob Stoklund Olesen
c3178f85b5 Fix Thumb and Thumb2 tests to be register allocator independent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 23:31:50 +00:00
Bruno Cardoso Lopes
ae0855401b Apply again changes to support ARM memory asm parsing. I removed 
all LDR/STR changes and left them to a future patch. Passing all
checks now.

- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
  fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
  printAddrMode2Operand to check by the addressing mode which index
  mode to print.
- Testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 23:26:08 +00:00
Jakob Stoklund Olesen
842759662b The basic register allocator must also use the inline spiller. 
It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128688 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 23:02:17 +00:00
Jakob Stoklund Olesen
1db952d0c6 Provide a legal pointer register class when targeting thumb1. 
The LocalStackSlotAllocation pass was creating illegal registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128687 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 23:02:15 +00:00
Jakob Stoklund Olesen
0caa420042 Fix SystemZ tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128686 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 23:02:12 +00:00
Nadav Rotem
0ff8a4fa35 Instcombile optimization: extractelement(cast) -> cast(extractelement) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128683 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 22:57:29 +00:00
Jakob Stoklund Olesen
ca6fd009ad Fix ARM tests to be register allocator independent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128680 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 22:14:03 +00:00
Benjamin Kramer
7ebdc37d2b InstCombine: APFloat can't perform arithmetic on PPC double doubles, don't even try. 
Thanks Eli!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128676 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 21:35:49 +00:00
Johnny Chen
0c630b5f38 Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, which 
amounts to an UNDEFINED instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128668 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 20:54:30 +00:00
Evan Cheng
463d358f1d Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier 
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 19:38:48 +00:00
Johnny Chen
a52d7da1d8 Fix single word and unsigned byte data transfer instruction encodings so that 
Inst{4} = 0.

rdar://problem/9213022


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128662 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 19:28:35 +00:00
Jakob Stoklund Olesen
a6f7499244 Fix Mips, Sparc, and XCore tests that were dependent on register allocation. 
Add an extra run with -regalloc=basic to keep them honest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 18:42:43 +00:00
Akira Hatanaka
1d6b38d9d3 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 18:26:17 +00:00
Nick Lewycky
5bb3eced65 Pick better examples. "fpext float 3.1415 to double" won't parse because 3.1415 
isn't an exact float. Also "fpext float 1.0 to float" is invalid IR because
it's not performing an extension.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 18:20:19 +00:00
Jakob Stoklund Olesen
280ea1a746 Don't completely eliminate identity copies that also modify super register liveness. 
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 17:55:25 +00:00
Johnny Chen
8901e6ff3d Add BLXi to the instruction table for disassembly purpose. 
A8.6.23 BLX (immediate)

rdar://problem/9212921


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 17:53:50 +00:00
Jakob Stoklund Olesen
02ae9f2f27 Allow kill flags on two-address instructions. They are harmless. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128643 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 17:52:41 +00:00
Jakob Stoklund Olesen
8e53aca51a Mark all uses as <undef> when joining a copy. 
This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.

Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128642 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 17:23:25 +00:00
Daniel Dunbar
48a36158ec Remove stray empty test file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128640 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 17:01:56 +00:00
Devang Patel
e62dfcf4b3 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128639 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 16:53:49 +00:00
Bruno Cardoso Lopes
b41aaab5a1 Revert r128632 again, until I figure out what break the tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 15:54:36 +00:00
Jakob Stoklund Olesen
314a3ef502 Fix bug found by valgrind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 15:14:11 +00:00
Richard Osborne
e8f3533323 Add XCore intrinsics for initializing / starting / synchronizing threads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128633 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 15:13:13 +00:00
Bruno Cardoso Lopes
bcd3a9cd84 Reapply r128585 without generating a lib depedency cycle. An updated log: 
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
  {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible.
- Move all instructions which use am2offset without a pattern to use
  addrmode2.
- Add a new encoding bit to describe the index mode used and teach
  printAddrMode2Operand to check by the addressing mode which index
  mode to print.
- Testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128632 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 14:52:28 +00:00
Michael J. Spencer
56584fcbfd Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128631 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 13:06:39 +00:00
Michael J. Spencer
c9c08fb3a7 Switch FileRemover from PathV1 to V2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128630 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 13:04:19 +00:00
NAKAMURA Takumi
dc5198bac7 lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use std::pow(float,float) here. 
We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts).
For consistency, std::pow(double,double) may be called instead.
Or, precision issue might attack us, to see unstable regalloc and stack coloring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 12:11:33 +00:00
Benjamin Kramer
00e00d693c InstCombine: Fix transform to use the swapped predicate. 
Thanks Frits!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128628 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 10:46:03 +00:00
Benjamin Kramer
68b4bd0a63 InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, y 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 10:12:22 +00:00
Benjamin Kramer
0db50189dc InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -C 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 10:12:15 +00:00
Benjamin Kramer
b194bdc03b InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be losslessly converted to the type of x. 
Fixes PR9592.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128625 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 10:12:07 +00:00
Benjamin Kramer
cd0274ca18 InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128624 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 10:11:58 +00:00