5 Commits

Author	SHA1	Message	Date
Dan Gohman	ae3a0be92e	Split the Add, Sub, and Mul instruction opcodes into separate ... integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8	2009-06-04 22:49:04 +00:00
Bill Wendling	4ff5047240	This looks like it passes now. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72485 91177308-0d34-0410-b5e6-96231b3b80d8	2009-05-27 17:43:21 +00:00
Dan Gohman	bc0b56732a	The list-td and list-tdrr schedulers don't yet support physreg ... scheduling dependencies. Add assertion checks to help catch this. It appears the Mips target defaults to list-td, and it has a regression test that uses a physreg dependence. Such code was liable to be miscompiled, and now evokes an assertion failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8	2009-01-13 20:24:13 +00:00
Duncan Sands	7cb07874dc	Turn on LegalizeTypes, the new type legalization ... codegen infrastructure, by default. Please report any breakage to the mailing lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58232 91177308-0d34-0410-b5e6-96231b3b80d8	2008-10-27 08:42:46 +00:00
Bruno Cardoso Lopes	29b4ff7c73	Batch 4 of Mips CodeGen tests ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54509 91177308-0d34-0410-b5e6-96231b3b80d8	2008-08-08 04:08:30 +00:00