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Author SHA1 Message Date
Andrew Trick
48ba0e45ed Reapply r141870, SCEV expansion of post-inc. 
Speculatively reapply to see if this test case still crashes on
linux. I may have fixed it in my last checkin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 21:55:29 +00:00
Eric Christopher
fe28ef41e3 Don't forget to reconstruct D after changing the scope that we're 
looking at.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 21:43:44 +00:00
Richard Osborne
a4d326dcef Update IntrinsicsXCore.td with the normal LLVM notice at the top of the file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 21:08:11 +00:00
Michael J. Spencer
14a5f468d6 llvm-objdump: Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141886 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 20:37:20 +00:00
Michael J. Spencer
178dbd4418 llvm-objdump: Fix dumping of multiple symbols with the same address. 
This happens in COFF because there is a symbol for the beginning of each
section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141885 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 20:37:08 +00:00
Michael J. Spencer
bff6f8679a COFF: Implement sectionContainsSymbol for relocatable files only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141884 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 20:36:54 +00:00
Andrew Trick
7f1653a7ae Fix memory corruption I introduced a few checkins ago. 
Self-review easily caught this obvious bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141880 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 18:49:23 +00:00
NAKAMURA Takumi
e9d3c1cfbe configure: [cygming] Set --disable-embed-stdcxx by default on --enable-shared. 
Many distros provide stdc++.dll recently. --enable-embed-stdcxx might confuse people.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 18:04:52 +00:00
Owen Anderson
c18e940c5a SETEND is not allowed in an IT block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141874 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:58:39 +00:00
Andrew Trick
753e02ad5d Revert r141870. The test case crashes on linux with data corruption. A deeper issue was exposed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141873 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:58:24 +00:00
NAKAMURA Takumi
e0af2adc18 docs/CMake.html: Clarify LLVM_LIT_TOOLS_DIR as :PATH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:36:02 +00:00
Michael J. Spencer
c8f6c44af4 Fix incorrect ELF typedefs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141871 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:33:52 +00:00
Andrew Trick
b00175913a LSR: Reuse the post-inc expansion of expressions. 
This avoids unnecessary expansion of expressions and allows the SCEV
expander to work on expression DAGs, not just trees.
Fixes PR11090.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141870 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:31:47 +00:00
Daniel Dunbar
5d332f8b4a build: Remove some stray LLVMC configure variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:27:34 +00:00
Andrew Trick
94f01db27b SCEV: Rewrite TrandformForPostIncUse to handle expression DAGs, not 
just expression trees.

Partially fixes PR11090. Test case will be with the full fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:21:09 +00:00
Andrew Trick
ce1823cd1b Slightly more useful tracing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141867 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 17:06:38 +00:00
Benjamin Kramer
d38e99e949 Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141863 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 14:27:54 +00:00
Kalle Raiskila
898f336c51 Mark 'branch indirect' instruction as an indirect branch. 
Not having it confused assembly printing of jumptables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141862 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 11:40:03 +00:00
Bill Wendling
4e68054b20 More closely follow libgcc, which has code after the `ret' instruction to 
release the stack segment and reset the stack pointer. Place the code in its own
MBB to make the verifier happy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141859 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 08:24:19 +00:00
Bill Wendling
1203fe7fc8 Revert r141854 because it was causing failures: 
http://lab.llvm.org:8011/builders/llvm-x86_64-linux/builds/101

--- Reverse-merging r141854 into '.':
U    test/MC/Disassembler/X86/x86-32.txt
U    test/MC/Disassembler/X86/simple-tests.txt
D    test/CodeGen/X86/bmi.ll
U    lib/Target/X86/X86InstrInfo.td
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86.td
U    lib/Target/X86/X86Subtarget.h



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141857 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 07:48:07 +00:00
Bill Wendling
82222c20be Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141856 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 07:42:32 +00:00
Cameron Zwarich
326e491ce7 Use an existing method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141855 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 07:36:41 +00:00
Craig Topper
8ab1d1e900 Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141854 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 07:09:14 +00:00
Craig Topper
d501c714cd Add 'implicit EFLAGS' to patterns for popcnt and lzcnt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141853 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 06:18:52 +00:00
Nick Lewycky
f77dea13d7 Elf_Word is not POD! Stop using it in a DenseMap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141851 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 03:30:21 +00:00
Nick Lewycky
dec1b10161 If MI is deleted then remove it from the set. If a new MI is created, it could 
have the same address as the one we deleted, and we don't want that in the set
yet. Noticed by inspection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141849 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 02:16:18 +00:00
Nick Lewycky
ea3abd5536 Tabs to spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141844 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 01:09:50 +00:00
Nick Lewycky
3821b1885e Add missing braces to pacify GCC's -Wparentheses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141842 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 00:54:59 +00:00
Michael J. Spencer
fc61a23506 Add missing ELF constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141840 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-13 00:16:25 +00:00
Jakob Stoklund Olesen
dee83c90bb Also inflate register classes around inline asm. 
Now that MI->getRegClassConstraint() can also handle inline assembly,
don't bail when recomputing the register class of a virtual register
used by inline asm.

This fixes PR11078.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141836 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 23:37:40 +00:00
Jakob Stoklund Olesen
f5916976e9 Add MachineInstr::getRegClassConstraint(). 
Most instructions have some requirements for their register operands.
Usually, this is expressed as register class constraints in the
MCInstrDesc, but for inline assembly the constraints are encoded in the
flag words.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141835 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 23:37:36 +00:00
Jakob Stoklund Olesen
9dfaacb696 Extract a method for finding the inline asm flag operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 23:37:33 +00:00
Jakob Stoklund Olesen
459b74b964 Encode register class constreaints in inline asm instructions. 
The inline asm operand constraint is initially encoded in the virtual
register for the operand, but that register class may change during
coalescing, and the original constraint is lost.

Encode the original register class as part of the flag word for each
inline asm operand.  This makes it possible to recover the actual
constraint required by inline asm, just like we can for normal
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 23:37:29 +00:00
Eli Friedman
a3a1635d04 Attempt to fix MSVC build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 23:14:41 +00:00
Bill Wendling
f6fb7ed53c We need to verify that the machine instruction we're using as a replacement for 
our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 23:03:40 +00:00
Eli Friedman
5c75af6eb7 Use a utility from MathExtras to clarify a check and avoid undefined behavior. Based on patch by Ahmed Charles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141829 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:46:45 +00:00
Owen Anderson
95f8db4d4d The VMAs stored in the symbol table of a MachO file are absolute addresses, not offsets from the section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:37:10 +00:00
Eli Friedman
a046d2ff9a Use unsigned multiply to hash integers, so we don't end up with undefined behavior for large signed integers. Based on patch by Ahmed Charles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141827 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:25:45 +00:00
Lang Hames
68df750a4f Removed colons from some target datalayout strings in test, since they don't match the required format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141825 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:24:17 +00:00
Owen Anderson
10a8c62d46 Don't label a STAB debugging symbol as a function symbol. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141824 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:23:12 +00:00
Owen Anderson
cd74988fb9 sectionContainsSymbol needs to be based on VMA's rather than section indices to properly account for files with segment load commands that contain no sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141822 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:21:32 +00:00
Eli Friedman
18ead6b587 Fix a couple hash functions so that they do not depend on undefined shifts. Based on patch by Ahmed Charles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141820 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 22:00:26 +00:00
Jim Grosbach
81b2928d80 ARM addrmode5 represents the 'U' bit of the encoding backwards. 
The disassembler needs to use the AM5 factory methods instead of just
building up the immediate directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141819 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:59:02 +00:00
Eli Friedman
90196fced2 Fix APFloat::getSmallestNormalized so the shift doesn't depend on undefined behavior. Patch from Ahmed Charles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141818 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:56:19 +00:00
Eli Friedman
7247a5f20e Fix APFloat::getLargest so that it actually returns the correct value. Found by accident while reviewing a patch to nearby code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141816 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:51:36 +00:00
Owen Anderson
41242942fc Section indices in MachO symbol tables begin at 1, not 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141815 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:43:24 +00:00
Kevin Enderby
acbaecd4c8 Finish supporting cpp #file/line comments in assembler for error messages. So 
for cpp pre-processed assembly we give correct filename and line numbers when
reporting errors in assembly files when using clang and -integrated-as on .s
files. rdar://8998895



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141814 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:38:39 +00:00
Evan Cheng
7007e4c556 Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141813 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:33:49 +00:00
Cameron Zwarich
980df16920 To find the exiting VN of a LiveInterval from a block, use the previous slot 
rather than the previous index. If a block has a single instruction, the
previous index may be in a different basic block.

I have no clue how this used to work on all of test-suite, because now this
failure is seen quite often when trying to compile code with -strong-phi-elim.
This fixes PR10252.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141812 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 21:24:54 +00:00
Jim Grosbach
c66e7afcf2 Thumb2 assembly parsing and encoding for LDC/STC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 20:54:17 +00:00