Commit Graph

17825 Commits

Author SHA1 Message Date
Hal Finkel
11e00a5be6 Correct the AggressiveAntiDepBreaker's handling of subregisters defining super registers
As the AggressiveAntiDepBreaker iterated backward through a scheduling region,
we must leave super registers live through subregister definitions so that all
relevant subregister definitions are renamed together. The problem was that we
were also discarding sub-register use locations as the sub-registers are
redefined. The result is that we'd rename the super register along with some,
but not all, subregister definitions.

  R0_D = {R0_L, R1_L}
  R0_L = {R0_S, R1_S}

  %R0_L<def> = TRLi9 16, pred:8, pred:%noreg
  %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg
  %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill>
  %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
  %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
  %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S

  Anti:   %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S
   Def Groups: R4_D=g213->g215(via R4_S)->g214(via R4_L)->g216(via R5_S)->g216(via R4_L)->g217(via R5_L)
   Use Groups: R0_D=g0->g218(last-use) R1_L->g219(last-use) R6_S=g204->g220(last-use)
  Anti:   %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R0_L=g208->g209(via R0_S)->g218(via R0_D)->g210(via R1_S)->g210(via R0_D)
   Antidep reg: R0_L (real dependency)
   Use Groups: R0_L=g210->g224(last-use) R0_S->g225(last-use) R1_S->g226(last-use)
  Anti:   %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R1_L=g219->g210(via R0_D)
   Antidep reg: R1_L (real dependency)
   Use Groups: R1_L=g210->g229(last-use)
  Anti:   %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill>
   Def Groups: R0_L=g224->g225(via R0_S)->g210(via R0_D)->g226(via R1_S)->g226(via R0_D)
   Antidep reg: R0_L Use Groups: R2_L=g192 R0_S=g226->g230(last-use) R0_L=g226->g231(last-use) R1_S->g232(last-use)
  Anti:   %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg
   Def Groups: R1_L=g229->g226(via R0_D)
   Antidep reg: R1_L Use Groups: R1_L=g226->g233(last-use) R0_S=g230
  Anti:   %R0_L<def> = TRLi9 16, pred:8, pred:%noreg
   Def Groups: R0_L=g231->g230(via R0_S)->g226(via R0_D)->g232(via R1_S)->g232(via R0_D)
   Antidep reg: R0_L
   Rename Candidates for Group g232:
    R0_D: elcInt64Regs :: R0_D R1_D R2_D R3_D R4_D R5_D R8_D R9_D R10_D R11_D R12_D R13_D R14_D R15_D R16_D R17_D R18_D R19_D R20_D R21_D R22_D R23_D R24_D R25_D
    R0_L: elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L
    R0_S: elcShrtRegs elcShrtRegs :: R0_S R1_S R2_S R3_S R4_S R5_S R8_S R9_S R10_S R11_S R12_S R13_S R14_S R15_S R16_S R17_S R18_S R19_S R20_S R21_S R22_S R23_S R24_S R25_S
   Find Registers: [R12_D: R12_D R12_L R12_S]
   Breaking anti-dependence edge on R0_L: R0_D->R12_D(1 refs) R0_L->R12_L(2 refs) R0_S->R12_S(2 refs)
   Use Groups:
  ...

  %R12_L<def> = TRLi9 16, pred:8, pred:%noreg
  %R1_L<def> = LSRLrr %R1_L<kill>, %R12_S, pred:8, pred:%noreg
  %R0_L<def> = LSRLrr %R2_L<kill>, %R12_S, pred:8, pred:%noreg, %R12_L<imp-use>
  %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
  %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
  %R4_D<def> = ASRDrr %R12_D<kill>, %R6_S

With this change, we now produce:

  Anti:   %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S
   Def Groups: R4_D=g213->g215(via R4_S)->g214(via R4_L)->g216(via R5_S)->g216(via R4_L)->g217(via R5_L)
   Use Groups: R0_D=g0->g218(last-use) R1_L->g219(last-use) R6_S=g204->g220(last-use)
  Anti:   %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R0_L=g208->g209(via R0_S)->g218(via R0_D)->g210(via R1_S)->g210(via R0_D)
   Antidep reg: R0_L (real dependency)
   Use Groups: R0_L=g210
  Anti:   %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg
   Def Groups: R1_L=g219->g210(via R0_D)
   Antidep reg: R1_L (real dependency)
   Use Groups: R1_L=g210
  Anti:   %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill>
   Def Groups: R0_L=g210->g210(via R0_D)->g210(via R0_D)
   Antidep reg: R0_L Use Groups: R2_L=g192 R0_S=g210 R0_L=g210
  Anti:   %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg
   Def Groups: R1_L=g210->g210(via R0_D)
   Antidep reg: R1_L Use Groups: R1_L=g210 R0_S=g210
  Anti:   %R0_L<def> = TRLi9 16, pred:8, pred:%noreg
   Def Groups: R0_L=g210->g210(via R0_D)->g210(via R0_D)
   Antidep reg: R0_L
   Rename Candidates for Group g210:
    R0_D: elcInt64Regs :: R0_D R1_D R2_D R3_D R4_D R5_D R8_D R9_D R10_D R11_D R12_D R13_D R14_D R15_D R16_D R17_D R18_D R19_D R20_D R21_D R22_D R23_D R24_D R25_D
    R0_L: elcIntRegs elcIntAIRegs elcIntRegs elcIntRegs elcIntRegs elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L
    R1_L: elcIntRegs elcIntRegs elcIntRegs elcIntRegs elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L
    R0_S: elcShrtRegs elcShrtRegs :: R0_S R1_S R2_S R3_S R4_S R5_S R8_S R9_S R10_S R11_S R12_S R13_S R14_S R15_S R16_S R17_S R18_S R19_S R20_S R21_S R22_S R23_S R24_S R25_S
   Find Registers: [R12_D: R12_D R12_L R13_L R12_S]
   Breaking anti-dependence edge on R0_L: R0_D->R12_D(1 refs) R0_L->R12_L(7 refs) R1_L->R13_L(5 refs) R0_S->R12_S(2 refs)
   Use Groups:
  ...

  %R12_L<def> = TRLi9 16, pred:8, pred:%noreg
  %R13_L<def> = LSRLrr %R13_L<kill>, %R12_S, pred:8, pred:%noreg
  %R12_L<def> = LSRLrr %R2_L<kill>, %R12_S<kill>, pred:8, pred:%noreg, %R12_L<imp-use,kill>
  %R13_L<def> = ANDLri %R13_L<kill>, 2047, pred:8, pred:%noreg
  %R12_L<def> = ANDLri %R12_L<kill>, 2047, pred:8, pred:%noreg
  %R4_D<def> = ASRDrr %R12_D, %R6_S, %R12_L<imp-def>, %R12_S<imp-def>, %R13_S<imp-def>

As demonstrated by this example, this is also somewhat unfortunate, because
there is actually no need to rename the super register in this case (it is
fully covered by later subregister definitions), but we don't seem to track
enough information here to exploit that either.

Thanks to Daniil Troshkov for reporting the issue. The debug outputs in this
commit message are from Daniil.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 14:44:14 +00:00
Chandler Carruth
52334f2ad8 [LPM] Stop using the string based preservation API. It is an
abomination.

For starters, this API is incredibly slow. In order to lookup the name
of a pass it must take a memory fence to acquire a pointer to the
managed static pass registry, and then potentially acquire locks while
it consults this registry for information about what passes exist by
that name. This stops the world of LLVMs in your process no matter
how little they cared about the result.

To make this more joyful, you'll note that we are preserving many passes
which *do not exist* any more, or are not even analyses which one might
wish to have be preserved. This means we do all the work only to say
"nope" with no error to the user.

String-based APIs are a *bad idea*. String-based APIs that cannot
produce any meaningful error are an even worse idea. =/

I have a patch that simply removes this API completely, but I'm hesitant
to commit it as I don't really want to perniciously break out-of-tree
users of the old pass manager. I'd rather they just have to migrate to
the new one at some point. If others disagree and would like me to kill
it with fire, just say the word. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227294 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 04:57:56 +00:00
David Blaikie
41c1bc24e4 Add description to assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 02:43:15 +00:00
David Blaikie
f02ea34fb2 PR22356: DebugInfo: Handle the size of a member where the type of that member is a typedef (or other sugar) of a declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227290 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 02:34:53 +00:00
Quentin Colombet
24508d33fb Revert r227242 - Merge vector stores into wider vector stores (PR21711).
This commit creates infinite loop in DAG combine for in the LLVM test-suite
for aarch64 with mcpu=cylcone (just having neon may be enough to expose this).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227272 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 23:58:01 +00:00
Sanjay Patel
c232e7f8fb remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 22:26:56 +00:00
Sanjay Patel
5d68306018 fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227253 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 22:16:52 +00:00
Sanjay Patel
c94f9d3d2f Merge vector stores into wider vector stores (PR21711)
This patch resolves part of PR21711 ( http://llvm.org/bugs/show_bug.cgi?id=21711 ).

The 'f3' test case in that report presents a situation where we have two 128-bit
stores extracted from a 256-bit source vector. 

Instead of producing this:

vmovaps %xmm0, (%rdi)
vextractf128    $1, %ymm0, 16(%rdi)

This patch merges the 128-bit stores into a single 256-bit store:

vmovups %ymm0, (%rdi)

Differential Revision: http://reviews.llvm.org/D7208



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 20:50:27 +00:00
Manuel Jacob
145de00800 Add a FIXME in SelectionDAGBuilder before an assert that is valid only on X86.
When lowering memcpy, memset or memmove, this assert checks whether the pointer
operands are in an address space < 256 which means "user defined address space"
on X86.  However, this notion of "user defined address space" does not exist
for other targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 13:14:35 +00:00
Eric Christopher
ad5a857bc5 Replace some uses of getSubtargetImpl with the cached version
off of the MachineFunction or with the version that takes a
Function reference as an argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 08:48:42 +00:00
Eric Christopher
05935e2d04 Have the PBQP register allocator use the subtarget on the MachineFunction.
(and remove an extraneous private).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227181 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 08:27:06 +00:00
Eric Christopher
9a322a1250 Fix build failure with pointer vs reference.
NB: Saving files after editing helps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227178 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 08:00:42 +00:00
Eric Christopher
fd0f7927e0 Update a few calls to getSubtarget<> to either be getSubtargetImpl
when we didn't need the cast to the base class or the cached version
off of the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 07:54:39 +00:00
Eric Christopher
72e7586339 The subtarget is cached on the MachineFunction. Access it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 07:31:29 +00:00
Eric Christopher
ac33b1f5b3 MachineRegisterInfo can access TII off of the MachineFunction's
subtarget and so doesn't need the TargetMachine or to access via
getSubtargetImpl. Update all callers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227160 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 01:15:16 +00:00
Eric Christopher
07745031b1 Migrate AtomicExpandPass and DwarfEHPrepare to using a Function-ized getSubtargetImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 01:04:42 +00:00
Eric Christopher
24f37da028 Migrate CodeGenPrepare to use the Function based getSubtarget
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 01:01:38 +00:00
Eric Christopher
cdafa1003b Grab the TargetLowering info from the DAG rather than querying for
a subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 01:01:36 +00:00
Eric Christopher
7936ef08bd Cache the lookup of TargetLowering in the atomic expand pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227121 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 19:45:40 +00:00
Ahmed Bougacha
6f9c8fa5d4 [SelectionDAG] Fix assert message copypasta. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227119 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 19:31:42 +00:00
Eric Christopher
04bcc11905 Move DataLayout back to the TargetMachine from TargetSubtargetInfo
derived classes.

Since global data alignment, layout, and mangling is often based on the
DataLayout, move it to the TargetMachine. This ensures that global
data is going to be layed out and mangled consistently if the subtarget
changes on a per function basis. Prior to this all targets(*) have
had subtarget dependent code moved out and onto the TargetMachine.

*One target hasn't been migrated as part of this change: R600. The
R600 port has, as a subtarget feature, the size of pointers and
this affects global data layout. I've currently hacked in a FIXME
to enable progress, but the port needs to be updated to either pass
the 64-bitness to the TargetMachine, or fix the DataLayout to
avoid subtarget dependent features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 19:03:15 +00:00
Philip Reames
2bdb23849b Revert GCStrategy ownership changes
This change reverts the interesting parts of 226311 (and 227046).  This change introduced two problems, and I've been convinced that an alternate approach is preferrable anyways.

The bugs were:
- Registery appears to require all users be within the same linkage unit.  After this change, asking for "statepoint-example" in Transform/ would sometimes get you nullptr, whereas asking the same question in CodeGen would return the right GCStrategy.  The correct long term fix is to get rid of the utter hack which is Registry, but I don't have time for that right now.  227046 appears to have been an attempt to fix this, but I don't believe it does so completely.
- GCMetadataPrinter::finishAssembly was being called more than once per GCStrategy.  Each Strategy was being added to the GCModuleInfo multiple times.

Once I get time again, I'm going to split GCModuleInfo into the gc.root specific part and a GCStrategy owning Analysis pass.  I'm probably also going to kill off the Registry.  Once that's done, I'll move the new GCStrategyAnalysis and all built in GCStrategies into Analysis.  (As original suggested by Chandler.)  This will accomplish my original goal of being able to access GCStrategy from Transform/  without adding all of the builtin GCs to IR/.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227109 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:26:35 +00:00
Adrian Prantl
10543e8587 Debug info: Fix PR22296 by omitting the DW_AT_location if we lost the
physical register that is described in a DBG_VALUE.

In the testcase the DBG_VALUE describing "p5" becomes unavailable
because the register its address is in is clobbered and we (currently)
aren't smart enough to realize that the value is rematerialized immediately
after the DBG_VALUE and/or is actually a stack slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 19:04:08 +00:00
Elena Demikhovsky
70bae89669 Implemented cost model for masked load/store operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227035 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:44:46 +00:00
Saleem Abdulrasool
802805d352 CodeGen: drive-by formatting clean ups
Minor tweaks to whitespace formatting that I noticed was off.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227014 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-24 20:19:45 +00:00
Andrea Di Biagio
b981dc4a21 [DAG] Fix wrong canonicalization performed on shuffle nodes.
This fixes a regression introduced by r226816.
When replacing a splat shuffle node with a constant build_vector,
make sure that the new build_vector has a valid number of elements.

Thanks to Patrik Hagglund for reporting this problem and providing a
small reproducible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227002 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-24 11:54:29 +00:00
Reid Kleckner
339591e0a9 Fix assertion when C++ EH filters are present in functions using SEH
Should fix PR22305.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226969 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 23:51:25 +00:00
Adrian Prantl
eabbe07449 Address more review comments for DIExpression::iterator.
- input_iterator
- define an operator->
- make constructors private were possible

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226967 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 23:40:47 +00:00
Adrian Prantl
d5dc4cff6a Move the accessor functions from DIExpression::iterator into a wrapper
DIExpression::Operand, so we can write range-based for loops.

Thanks to David Blaikie for the idea.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226939 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 21:24:41 +00:00
Reid Kleckner
26ba4c13a7 Classify functions by EH personality type rather than using the triple
This mostly reverts commit r222062 and replaces it with a new enum. At
some point this enum will grow at least for other MSVC EH personalities.

Also beefs up the way we were sniffing the personality function.
Previously we would emit the Itanium LSDA despite using
__C_specific_handler.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D6987

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226920 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 18:49:01 +00:00
Adrian Prantl
7e97e25bfc Debug Info / PR22309: Allow union types to be emitted as unsigned constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226919 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 18:01:39 +00:00
Mehdi Amini
33cf319cd1 DAGCombine: always constant fold FMA when target disable FP exceptions
Summary: When trying to constant fold an FMA in the DAG, getNode()
fails to fold the FMA if an operand is not finite. In this case this
patch allows the constant folding if !TLI->hasFloatingPointExceptions()

Reviewers: resistor

Reviewed By: resistor

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D6912

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-23 07:07:20 +00:00
Jan Vesely
3ff611bb38 SelectionDAG: Add KnownBits and SignBits computation for EXTRACT_ELEMENT
v2: use getZExtValue
    add missing break
    codestyle

v3: add few more comments

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 23:42:41 +00:00
Ramkumar Ramachandra
230796b278 Intrinsics: introduce llvm_any_ty aka ValueType Any
Specifically, gc.result benefits from this greatly. Instead of:

gc.result.int.*
gc.result.float.*
gc.result.ptr.*
...

We now have a gc.result.* that can specialize to literally any type.

Differential Revision: http://reviews.llvm.org/D7020

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2015-01-22 20:14:38 +00:00
Sanjay Patel
05d5e213c4 merge consecutive stores of extracted vector elements (PR21711)
This is a 2nd try at the same optimization as http://reviews.llvm.org/D6698. 
That patch was checked in at r224611, but reverted at r225031 because it
caused a failure outside of the regression tests.

The cause of the crash was not recognizing consecutive stores that have mixed
source values (loads and vector element extracts), so this patch adds a check
to bail out if any store value is not coming from a vector element extract.

This patch also refactors the shared logic of the constant source and vector
extracted elements source cases into a helper function.

Differential Revision: http://reviews.llvm.org/D6850
 


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2015-01-22 18:21:26 +00:00
David Blaikie
2e96653b54 Revert "PR21408: Workaround the appearance of duplicate variables due to problems when inlining two calls to the same function from the same call site."
The underlying bug has been fixed in r226736 so there's no need to
workaround this anymore.

This reverts commit r220923.

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2015-01-22 17:49:59 +00:00
Adrian Prantl
71676d492a Rename DIExpressionIterator to DIExpression::iterator.
Addresses review feedback from Duncan.

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2015-01-22 16:55:20 +00:00
Michael Kuperstein
a52ddfa930 [DAGCombine] Produce better code for constant splats
This solves PR22276.
Splats of constants would sometimes produce redundant shuffles, sometimes ridiculously so (see the PR for details). Fold these shuffles into BUILD_VECTORs early on instead.

Differential Revision: http://reviews.llvm.org/D7093

Fixed recommit of r226811.

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2015-01-22 13:07:28 +00:00
Michael Kuperstein
8fc1c3a619 Revert r226811, MSVC accepts code sane compilers don't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 12:48:07 +00:00
Michael Kuperstein
0a979a09ae [DAGCombine] Produce better code for constant splats
This solves PR22276.
Splats of constants would sometimes produce redundant shuffles, sometimes ridiculously so (see the PR for details). Fold these shuffles into BUILD_VECTORs early on instead.

Differential Revision: http://reviews.llvm.org/D7093

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2015-01-22 12:37:23 +00:00
Elena Demikhovsky
2785766bc8 Fixed a bug in type legalizer for masked load/store intrinsics.
The problem occurs when after vectorization we have type
<2 x i32>. This type is promoted to <2 x i64> and then requires
additional efforts for expanding loads and truncating stores.
I added EXPAND / TRUNCATE attributes to the masked load/store
SDNodes. The code now contains additional shuffles.
I've prepared changes in the cost estimation for masked memory
operations, it will be submitted separately.



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2015-01-22 12:07:59 +00:00
Elena Demikhovsky
9cb8df2c75 Fixed a comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 10:01:36 +00:00
Elena Demikhovsky
cdce03426d Fixed a bug in narrowing store operation.
Type MVT::i1 became legal in KNL, but store operation can't be narrowed to this type,
since the size of VT (1 bit) is not equal to its actual store size(8 bits).

Added a test provided by David (dag@cray.com)


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2015-01-22 09:39:08 +00:00
Reid Kleckner
0d056fd4c3 Win64 SEH: Emit the constant 1 for catch-all into xdata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226767 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 02:27:44 +00:00
Adrian Prantl
8a1465afce Make DwarfExpression use the new DIExpressionIterator. NFC.
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2015-01-22 00:00:59 +00:00
Tim Northover
f5f8a3e6a6 DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))
It can help with argument juggling on some targets, and is generally a good
idea.

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2015-01-21 23:17:19 +00:00
Matthias Braun
9a43e3d47f LiveIntervalAnalysis: Mark subregister defs as undef when we determined they are only reading a dead superregister value
This was not necessary before as this case can only be detected when the
liveness analysis is at subregister level.

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2015-01-21 22:55:13 +00:00
Matthias Braun
7d3ec5af28 LiveIntervalAnalysis: Factor out code to update liveness on vreg def removal
This cleans up code and is more in line with the general philosophy of
modifying LiveIntervals through LiveIntervalAnalysis instead of changing
them directly.

This also fixes a case where SplitEditor::removeBackCopies() would miss
the subregister ranges.

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2015-01-21 19:02:30 +00:00
Matthias Braun
1458e05967 LiveIntervalAnalysis: Factor out code to update liveness on physreg def removal
This cleans up code and is more in line with the general philosophy of
modifying LiveIntervals through LiveIntervalAnalysis instead of changing
them directly.

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2015-01-21 18:50:21 +00:00
Matthias Braun
5a9462587d LiveIntervalAnalysis: Remove unused pruneValue() variant.
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2015-01-21 18:45:57 +00:00