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Commit Graph

Author	SHA1	Message	Date
Tim Northover	d5561bb1f0	ARM: tell LLVM about zext properties of ldrexb/ldrexh Implementing this via ComputeMaskedBits has two advantages: + It actually works. DAGISel doesn't deal with the chains properly in the previous pattern-based solution, so they never trigger. + The information can be used in other DAG combines, as well as the trivial "get rid of truncs". For example if the trunc is in a different basic block. rdar://problem/16227836 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205540 91177308-0d34-0410-b5e6-96231b3b80d8	2014-04-03 15:10:35 +00:00
Stephen Lin	be9dd85f44	Update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186594 91177308-0d34-0410-b5e6-96231b3b80d8	2013-07-18 18:35:22 +00:00
Tim Northover	2f438131f1	ARM: implement ldrex, strex and clrex intrinsics Intrinsics already existed for the 64-bit variants, so these support operations of size at most 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186392 91177308-0d34-0410-b5e6-96231b3b80d8	2013-07-16 09:46:55 +00:00

Author

SHA1

Message

Date

Tim Northover

d5561bb1f0

ARM: tell LLVM about zext properties of ldrexb/ldrexh

Implementing this via ComputeMaskedBits has two advantages:
  + It actually works. DAGISel doesn't deal with the chains properly
    in the previous pattern-based solution, so they never trigger.
  + The information can be used in other DAG combines, as well as the
    trivial "get rid of truncs". For example if the trunc is in a
    different basic block.

rdar://problem/16227836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205540 91177308-0d34-0410-b5e6-96231b3b80d8

2014-04-03 15:10:35 +00:00

Stephen Lin

be9dd85f44

Update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186594 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-18 18:35:22 +00:00

Tim Northover

2f438131f1

ARM: implement ldrex, strex and clrex intrinsics

Intrinsics already existed for the 64-bit variants, so these support operations
of size at most 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186392 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-16 09:46:55 +00:00

3 Commits