Commit Graph

19914 Commits

Author SHA1 Message Date
Joey Gouly
12f45c3782 Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 11:26:18 +00:00
Joey Gouly
8dc741d29f Add MC assembly/disassembly support for VRINT{Z, X, R} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 11:03:21 +00:00
Ulrich Weigand
b2713e018e [PowerPC] Support ".machine any"
The PowerPC assembler is supposed to provide a directive .machine
that allows switching the supported CPU instruction set on the fly.
Since we do not yet check CPU feature sets at all and always accept
any available instruction, this is not really useful at this point.

However, it makes sense to accept (and ignore) ".machine any" to
avoid spuriously rejecting existing assembler files that use this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 10:00:34 +00:00
Alexander Potapenko
9467b3e0ac Revert r185872 - "Stop emitting weak symbols into the "coal" sections"
This patch broke `make check-asan` on Mac, causing ld warnings like the following one:

ld: warning: direct access in __GLOBAL__I_a to global weak symbol
___asan_mapping_scale means the weak symbol cannot be overridden at
runtime. This was likely caused by different translation units being
compiled with different visibility settings.

The resulting test binaries crashed with incorrect ASan warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 10:00:16 +00:00
Joey Gouly
9fb5a6588b Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:59:04 +00:00
Richard Sandiford
2e015ef9bb [SystemZ] Use MVC for simple load/store pairs
Look for patterns of the form (store (load ...), ...) in which the two
locations are known not to partially overlap.  (Identical locations are OK.)
These sequences are better implemented by MVC unless either the load or
the store could use RELATIVE LONG instructions.

The testcase showed that we weren't using LHRL and LGHRL for extload16,
only sextloadi16.  The patch fixes that too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:46:39 +00:00
Richard Sandiford
f6ea5e0d80 [SystemZ] Use "STC;MVC" for memset
Use "STC;MVC" for memsets that are too big for two STCs or MV...Is yet
small enough for a single MVC.  As with memcpy, I'm leaving longer cases
till later.

The number of tests might seem excessive, but f33 & f34 from memset-04.ll
failed the first cut because I'd not added the "?:" on the calculation
of Size1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185918 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:32:42 +00:00
David Majnemer
fecf0d7a01 InstCombine: variations on 0xffffffff - x >= 4
The following transforms are valid if -C is a power of 2:
(icmp ugt (xor X, C), ~C) -> (icmp ult X, C)
(icmp ult (xor X, C), -C) -> (icmp uge X, C)

These are nice, they get rid of the xor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:20:58 +00:00
David Majnemer
36b6f7409d InstCombine: X & -C != -C -> X <= u ~C
Tests were added in r185910 somehow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 08:09:32 +00:00
Ulrich Weigand
ff16df71f5 [PowerPC] Support .llong and fix .word
This adds support for the .llong PowerPC-specifc assembler directive.
In doing so, I notices that .word is currently incorrect: it is
supposed to define a 2-byte data element, not a 4-byte one.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 07:59:25 +00:00
David Majnemer
11c29bafd5 Commit r185909 was a misapplied patch, fix it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 07:58:32 +00:00
David Majnemer
377a5c1a87 InstCombine: add more transforms
C1-X <u C2 -> (X|(C2-1)) == C1
C1-X >u C2 -> (X|C2) == C1
X-C1 <u C2 -> (X & -C2) == C1
X-C1 >u C2 -> (X & ~C2) == C1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185909 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 07:50:59 +00:00
Hal Finkel
fa55969acb PPC: Allocate RS spill slot for unaligned i64 load/store
This fixes another bug found by llvm-stress!

If we happen to be doing an i64 load or store into a stack slot that has less
than a 4-byte alignment, then the frame-index elimination may need to use an
indexed load or store instruction (because the offset may not be a multiple of
4, a requirement of the STD/LD instructions). The extra register needed to hold
the offset comes from the register scavenger, and it is possible that the
scavenger will need to use an emergency spill slot. As a result, we need to
make sure that a spill slot is allocated when doing an i64 load/store into a
less-than-4-byte-aligned stack slot.

Because test cases for things like this tend to be fairly fragile, I've
concatenated a few small bugpoint-reduced test cases together to form the
regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 06:34:51 +00:00
Eric Christopher
01e4509972 CEHCK->CHECK typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:47:33 +00:00
Eric Christopher
193a2da6d1 Fix up whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:47:31 +00:00
Bill Wendling
8722e25715 Stop emitting weak symbols into the "coal" sections.
The Mach-O linker has been able to support the weak-def bit on any symbol for
quite a while now. The compiler however continued to place these symbols into a
"coal" section, which required the linker to map them back to the base section
name.

Replace the sections like this:

  __TEXT/__textcoal_nt   instead use  __TEXT/__text
  __TEXT/__const_coal    instead use  __TEXT/__const
  __DATA/__datacoal_nt   instead use  __DATA/__data

<rdar://problem/14265330>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:34:52 +00:00
Ulrich Weigand
a68f58ab2b [PowerPC] Always use "assembler dialect" 1
A setting in MCAsmInfo defines the "assembler dialect" to use.  This is used
by common code to choose between alternatives in a multi-alternative GNU
inline asm statement like the following:

  __asm__ ("{sfe|subfe} %0,%1,%2" : "=r" (out) : "r" (in1), "r" (in2));

The meaning of these dialects is platform specific, and GCC defines those
for PowerPC to use dialect 0 for old-style (POWER) mnemonics and 1 for
new-style (PowerPC) mnemonics, like in the example above.

To be compatible with inline asm used with GCC, LLVM ought to do the same.
Specifically, this means we should always use assembler dialect 1 since
old-style mnemonics really aren't supported on any current platform.

However, the current LLVM back-end uses:
  AssemblerDialect = 1;           // New-Style mnemonics.
in PPCMCAsmInfoDarwin, and
  AssemblerDialect = 0;           // Old-Style mnemonics.
in PPCLinuxMCAsmInfo.

The Linux setting really isn't correct, we should be using new-style
mnemonics everywhere.  This is changed by this commit.

Unfortunately, the setting of this variable is overloaded in the back-end
to decide whether or not we are on a Darwin target.  This is done in
PPCInstPrinter (the "SyntaxVariant" is initialized from the MCAsmInfo
AssemblerDialect setting), and also in PPCMCExpr.  Setting AssemblerDialect
to 1 for both Darwin and Linux no longer allows us to make this distinction.

Instead, this patch uses the MCSubtargetInfo passed to createPPCMCInstPrinter
to distinguish Darwin targets, and ignores the SyntaxVariant parameter.
As to PPCMCExpr, this patch adds an explicit isDarwin argument that needs
to be passed in by the caller when creating a target MCExpr.  (To do so
this patch implicitly also reverts commit 184441.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185858 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 20:20:51 +00:00
Hal Finkel
947d447ee0 PPC: Mark vector CC action for SETO and SETONE as Expand
Another bug found by llvm-stress! This fixes hitting
  llvm_unreachable("Invalid integer vector compare condition");
at the end of getVCmpInst in PPCISelDAGToDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185855 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 20:00:03 +00:00
Joey Gouly
881b0b5c77 Add a comment to this change, requested by Eric Christopher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 19:52:51 +00:00
Jim Grosbach
dc2d418dd2 ARM: Improve codegen for generic vselect.
Fall back to by-element insert rather than building it up on the stack.

rdar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185846 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 18:18:52 +00:00
Hal Finkel
ad3b34d1bc PPC: Mark vector FREM as Expand by default
Another bug found by llvm-stress! This fixes crashing with:
  LLVM ERROR: Cannot select: v4f32 = frem ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 17:30:25 +00:00
Ulrich Weigand
19d2b78978 [PowerPC] Support time base instructions
This adds support for the old-style time base instructions;
while new programs are supposed to use mfspr, the mftb instructions
are still supported and in use by existing assembler files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185829 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 15:20:38 +00:00
Ulrich Weigand
9e5bbeab1f [PowerPC] Support basic compare mnemonics
This adds support for the basic mnemoics (with the L operand) for the
fixed-point compare instructions.  These are defined as aliases for the
already existing CMPW/CMPD patterns, depending on the value of L.

This requires use of InstAlias patterns with immediate literal operands.
To make this work, we need two further changes:

 - define a RegisterPrefix, because otherwise literals 0 and 1 would
   be parsed as literal register names

 - provide a PPCAsmParser::validateTargetOperandClass routine to
   recognize immediate literals (like ARM does)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185826 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 14:49:37 +00:00
Bill Schmidt
12ae7fd2da [PowerPC] Fix PR16556 (handle undef ppcf128 in LowerFP_TO_INT).
PPCTargetLowering::LowerFP_TO_INT() expects its source operand to be
either an f32 or f64, but this is not checked.  A long double
(ppcf128) operand will normally be custom-lowered to a conversion to
f64 in this context.  However, this isn't the case for an UNDEF node.

This patch recognizes a ppcf128 as a legal source operand for
FP_TO_INT only if it's an undef, in which case it creates an undef of
the target type.

At some point we might want to do a wholesale custom lowering of
ISD::UNDEF when the type is ppcf128, but it's not really clear that's
a great idea, and probably more work than it's worth for a situation
that only arises in the case of a programming error.  At this point I
think simple is best.

The test case comes from PR16556, and is a crash-test only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185821 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 14:22:45 +00:00
Reid Kleckner
9f23fe0ea5 Convert an OCaml binding grep test to FileCheck
I shaved this yak because I mistakenly thought that this was one of the
last grep tests.  Turns out my search was skipping .ll files, for which
there are ~1200 more tests using grep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 14:14:22 +00:00
David Majnemer
53fc39992d InstCombine: Fold X-C1 <u 2 -> (X & -2) == C1
Back in r179493 we determined that two transforms collided with each
other.  The fix back then was to reorder the transforms so that the
preferred transform would give it a try and then we would try the
secondary transform.  However, it was noted that the best approach would
canonicalize one transform into the other, removing the collision and
allowing us to optimize IR given to us in that form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185808 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 11:53:08 +00:00
Nico Rieck
4010110ccf Reuse %rax after calling __chkstk on win64
Reapply this as I reverted the wrong commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185807 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 11:20:11 +00:00
Nico Rieck
63e7778b53 Revert "Proper va_arg/va_copy lowering on win64"
This reverts commit 2b52880592.

Needs review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185806 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 11:19:44 +00:00
Richard Sandiford
dff0009d0c [SystemZ] Use MVC for memcpy
Use MVC for memcpy in cases where a single MVC is enough.  Using MVC is
a win for longer copies too, but I'll leave that for later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185802 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 09:35:23 +00:00
NAKAMURA Takumi
12b701beea llvm/test/CMakeLists.txt: Add llvm-cov in "check-clang".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185801 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 08:44:36 +00:00
NAKAMURA Takumi
3197a8fe7b llvm/test/CMakeLists.txt: Reformat LLVM_TEST_DEPENDS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185800 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 08:44:30 +00:00
NAKAMURA Takumi
3b7e9787aa llvm/test/Other/llvm-cov.test: It requires +Asserts to let XFAILed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185799 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 08:44:24 +00:00
Hal Finkel
63e7a38c89 Fix PromoteIntRes_BUILD_VECTOR crash with i1 vectors
This fixes a bug (found by llvm-stress) in
DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR where it assumed that the result
type would always be larger than the original operands. This is not always
true, however, with boolean vectors. For example, promoting a node of type v8i1
(where the operands will be of type i32, the type to which i1 is promoted) will
yield a node with a result vector element type of i16 (and operands of type
i32). As a result, we cannot blindly assume that we can ANY_EXTEND the operands
to the result type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185794 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 06:16:58 +00:00
Kai Nacke
5310cdbcc9 Revert: Fix wrong code offset for unwind code SET_FPREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185793 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 04:48:34 +00:00
Kai Nacke
9611873724 Revert: Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH data structures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185791 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 04:46:55 +00:00
Kai Nacke
9c411e649e Revert: Fix alignment of unwind data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185790 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 04:45:05 +00:00
Hal Finkel
04b84c2f92 Add the nearbyint -> FNEARBYINT mapping to BasicTargetTransformInfo
This fixes an oversight that Intrinsic::nearbyint was not being mapped to
ISD::FNEARBYINT (thus fixing the over-optimistic cost we were assigning to
nearbyint calls for some targets).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 03:24:07 +00:00
Michael Gottesman
2abe4eeaf9 [objc-arc] Committed test for r185770 as per dblaikie's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 02:13:47 +00:00
Nico Rieck
d56e7e198d Revert "Reuse %rax after calling __chkstk on win64"
This reverts commit 01f8d579f7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185781 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 01:30:57 +00:00
Nico Rieck
01f8d579f7 Reuse %rax after calling __chkstk on win64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185778 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-07 16:48:39 +00:00
Nick Lewycky
37ade2b801 Eliminate trivial redundant loads across nocapture+readonly calls to uncaptured
pointer arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185776 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-07 10:15:16 +00:00
Nadav Rotem
369cc938d2 SLPVectorizer: Implement DCE as part of vectorization.
This is a complete re-write if the bottom-up vectorization class.
Before this commit we scanned the instruction tree 3 times. First in search of merge points for the trees. Second, for estimating the cost. And finally for vectorization.
There was a lot of code duplication and adding the DCE exposed bugs. The new design is simpler and DCE was a part of the design.
In this implementation we build the tree once. After that we estimate the cost by scanning the different entries in the constructed tree (in any order). The vectorization phase also works on the built tree.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185774 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-07 06:57:07 +00:00
Michael Gottesman
95a1b3484d [objc-arc] Remove the alias analysis part of r185764.
Upon further reflection, the alias analysis part of r185764 is not a safe
change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185770 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-07 04:18:03 +00:00
Michael Gottesman
0a80c12402 [objc-arc] Teach the ARC optimizer that objc_sync_enter/objc_sync_exit do not modify the ref count of an objc object and additionally are inert for modref purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185769 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-07 01:52:55 +00:00
Joey Gouly
2a9683289b Add MC support for the v8fp instructions: vmaxnm and vminnm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-06 20:50:18 +00:00
Nico Rieck
2b52880592 Proper va_arg/va_copy lowering on win64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185763 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-06 18:08:19 +00:00
Kai Nacke
59c5c6c2b2 Fix alignment of unwind data.
For alignment purposes, the instruction array will always have an even
number of entries, with the final entry potentially unused (in which
case the array will be one longer than indicated by the count of unwind
codes field).

Reviewed by Charles Davis and Nico Rieck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185760 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-06 17:16:50 +00:00
Kai Nacke
eececbc7d3 Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH
data structures.

The Win64 EH data structures must be of type IMAGE_REL_AMD64_ADDR32NB
instead of IMAGE_REL_AMD64_ADDR32. This is easiely achieved by adding
the VK_COFF_IMGREL32 modifier to the symbol reference.
Change also references to start and end of the SEH range of a function
as offsets to start of the function.

Reviewed by Charles Davis and Nico Rieck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185759 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-06 17:16:12 +00:00
Kai Nacke
ea434e4bca Fix wrong code offset for unwind code SET_FPREG.
The code offset for unwind code SET_FPREG is wrong because it is set
to constant 0. The fix is to do the same as for the other unwind
codes: emit a label and later the absolute difference between the
label and the begin of the prologue.
Also enables the failing test case MC/COFF/seh.s

Reviewed by Charles Davis and Nico Rieck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185758 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-06 17:15:36 +00:00
Benjamin Kramer
f4eeab452a DAGCombiner: Don't drop extension behavior when shrinking a load when unsafe.
ReduceLoadWidth unconditionally drops extensions from loads. Limit it to the
case when all of the bits the extension would otherwise produce are dropped by
the shrink. It would be possible to shrink the load in more cases by merging
the extensions, but this isn't trivial and a very rare case. I left a TODO for
that case.

Fixes PR16551.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185755 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-06 14:05:09 +00:00