Commit Graph

32 Commits

Author SHA1 Message Date
Chris Lattner
9414ae5291 hoist some funky logic into CodeGenInstruction
from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 20:09:24 +00:00
Chris Lattner
f506b6b471 capture implicit uses and defs in CodeGenInstruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:42:03 +00:00
Chris Lattner
f55eed299b rewrite this to not artificially force concat the ins/outs list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:07:39 +00:00
Chris Lattner
b0be4d261b eliminate support for "ops" in the input/output list of an
instruction.  Instructions must use 'ins' and 'outs' now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:56:35 +00:00
Chris Lattner
cedef1ccf0 remove some code that was working around old sparc v9 backend bugs.
Add checking that the input/output operand list in spelled right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98865 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:50:52 +00:00
Dan Gohman
bc9d98b52d The mayHaveSideEffects flag is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-27 23:47:46 +00:00
Chris Lattner
a7d479c7bd Introduce a new CodeGenInstruction::ConstraintInfo class
for representing constraint info semantically instead of
as a c expression that will be blatted out to the .inc
file.  Fix X86RecognizableInstr to use this instead of
parsing C code :).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 01:45:28 +00:00
Benjamin Kramer
d4f195999a Reimplement getToken and SplitString as "StringRef helper functions"
- getToken is modeled after StringRef::split but it can split on multiple
  separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
  same behaviour as getToken.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93161 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 18:03:24 +00:00
Jim Grosbach
06801722a4 Add @earlyclobber TableGen constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91554 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 19:43:02 +00:00
Jim Grosbach
f0a4fad995 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 19:28:13 +00:00
Dan Gohman
533297b58d Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29 18:10:34 +00:00
Evan Cheng
799d697bf8 Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When
set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01 08:21:18 +00:00
Bob Wilson
fd87e6a7aa Fix bad length argument to substr calls. Apparently I'm the first one to
attempt more than 2 constraints on an instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80169 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 22:50:39 +00:00
David Greene
e8cf21e8e3 Make BinOps typed and require a type specifier for !nameconcat. This
allows binops to be used in typed contexts such as when passing
arguments to classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69921 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 21:25:15 +00:00
David Greene
c7cafcd815 Implement !nameconcat to concatenate strings and look up the resulting
name in the symbol table, returning an object.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69822 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-22 20:18:10 +00:00
Dan Gohman
15511cf166 Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60487 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 18:15:48 +00:00
Matthijs Kooijman
677fbfa450 Remove redundant word in tblgen error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 15:59:43 +00:00
Dale Johannesen
48c1bc2ace Handle some 64-bit atomics on x86-32, some of the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-02 18:53:47 +00:00
Dan Gohman
e4c67cdab4 Teach the DAGISelEmitter to not compute the variable_ops operand
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 02:11:25 +00:00
Dan Gohman
d35121ad00 Fix a tblgen problem handling variable_ops in tblgen instruction
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.

This fixes "rdar://5791600", whatever that is ;-).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51699 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 19:57:41 +00:00
Bill Wendling
8370d38ade Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 22:54:52 +00:00
Evan Cheng
20ccded7de Remove isImplicitDef TargetInstrDesc flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:19:36 +00:00
Christopher Lamb
5b4153710e Recommitting changes after more testing. These appear to cause no problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48222 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 09:33:47 +00:00
Evan Cheng
4499e495ea Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:31:26 +00:00
Christopher Lamb
620d741250 Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48125 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 04:13:41 +00:00
Chris Lattner
ba7e756c22 Start inferring side effect information more aggressively, and fix many bugs in the
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects.  It would be really nice if we could
write patterns for copy instructions.

I have audited all the x86 instructions down to MOVDQAmr.  The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45829 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10 07:59:24 +00:00
Chris Lattner
dcc8b4f5d3 add a mayLoad property for machine instructions, a correlary to mayStore.
This is currently not set by anything.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-08 18:05:21 +00:00
Chris Lattner
8f707e15fb rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 05:19:29 +00:00
Chris Lattner
af3eb7c758 the name field of instructions is never set to a non-empty string,
just unconditionally use the def name of the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45684 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 04:57:31 +00:00
Chris Lattner
834f1ce031 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 23:38:27 +00:00
Chris Lattner
2e48a70b35 rename isStore -> mayStore to more accurately reflect what it captures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 08:36:04 +00:00
Chris Lattner
6cc654b27a Split the impl of CodeGenInstruction out to its own .cpp file, add a getName() accessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45645 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 01:35:39 +00:00