Commit Graph

5325 Commits

Author SHA1 Message Date
Jim Grosbach
186ffac4d3 Improve ARM assembly parser diagnostic for unexpected tokens.
Consider:
  mov r8, r11 fred

Previously, we issued the not very informative:
x.s:6:1: error: unexpected token in argument list

^

Now we generate:
x.s:5:14: error: unexpected token in argument list
  mov r8, r11 fred
              ^


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 18:27:04 +00:00
Bob Wilson
6d2f9cec71 Reenable tail calls for iOS 5.0 and later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 17:17:49 +00:00
Bob Wilson
2fef4573df Reenable use of divmod compiler_rt functions for iOS 5.0 and later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 16:59:21 +00:00
Anton Korobeynikov
244455e6d6 Peephole optimization for ABS on ARM.
Patch by Ana Pazos!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141365 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 16:15:08 +00:00
Bill Wendling
217f0e9ca4 Use the correct vreg here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 23:41:14 +00:00
Bill Wendling
083a8eb063 Generate the dispatch code for a 'thumb' function. This is very similar to the
others. They take the call site value. Determine if it's a proper value. And
then jumps to the correct call site via a jump table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 23:37:36 +00:00
Owen Anderson
7011eee9b5 Fix the check for nested IT instructions in the disassembler. We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 23:33:11 +00:00
Bill Wendling
95ce2e9c52 Generate the dispatch table for ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141327 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 22:53:00 +00:00
Bill Wendling
e29fa1df55 Refactor some of the code that sets up the entry block for SjLj EH. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 22:18:16 +00:00
Bill Wendling
5e2cbc1133 Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!)
Place the immediate to OR into a register so that it works.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 21:51:21 +00:00
Bill Wendling
04f15b4f2f * Set the low bit of the return address when we are in thumb mode.
* Some code cleanup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 21:29:56 +00:00
Peter Collingbourne
de8f33c199 Build system infrastructure for multiple tblgens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 01:51:51 +00:00
Bill Wendling
930193cb55 Add the MBBs before inserting the instructions. Doing it afterwards could lead
to an infinite loop because of the def-use chains.

Also use a frame load instead of store for the LD instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141263 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 00:53:33 +00:00
Cameron Zwarich
8f8aa815b4 Always merge profitable shifts on A9, not just when they have a single use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141248 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 23:39:02 +00:00
Cameron Zwarich
d78ebe1e12 Remove a check from ARM shifted operand isel helper methods, which were blocking
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 23:38:50 +00:00
Bill Wendling
5cbef19a1d Get the proper call site numbers for the landing pads. Also remove a magic
number (18) for the proper addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 23:28:57 +00:00
Owen Anderson
2dbb46a0a0 Support a valid, but not very useful, encoding of CPSIE where none of the AIF bits are set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 17:16:40 +00:00
Cameron Zwarich
fb77752253 Add braces around something that throws me for a loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141173 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 08:59:10 +00:00
Cameron Zwarich
5ee0262014 There is no point in setting out-parameters for a ComplexPattern function when
it returns false, at least as far as I could tell by reading the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 08:59:05 +00:00
Bill Wendling
bb73468e2b Look at the number of entries in the jump table and jump to a 'trap' block if
the value exceeds that number.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:39:32 +00:00
Bill Wendling
2a85015313 Checkpoint for SJLJ EH code.
This is a first pass at generating the jump table for the sjlj dispatch. It
currently generates something plausible, but hasn't been tested thoroughly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 00:02:33 +00:00
Owen Anderson
2fec6c5ff1 Teach the MC to output code/data region marker labels in MachO and ELF modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 23:26:17 +00:00
Kevin Enderby
9e5887b17e Adding back support for printing operands symbolically to ARM's new disassembler
using llvm's public 'C' disassembler API now including annotations.

Hooked this up to Darwin's otool(1) so it can again print things like branch
targets for example this:
 blx _puts
instead of this:
 blx #-36
and includes support for annotations for branches to symbol stubs like:
 bl	0x40 @ symbol stub for: _puts
and annotations for pc relative loads like this:
 ldr	r3, #8 @ literal pool for: Hello, world!
Also again can print the expression encoded in the Mach-O relocation entries for
things like this:
 movt r0, :upper16:((_foo-_bar)+1234)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 22:44:48 +00:00
Jim Grosbach
9d39036f62 ARM assembly parsing and encoding for VMOV immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:38:36 +00:00
Jim Grosbach
2a3f19d7e3 Tidy up. 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:03:26 +00:00
Bill Wendling
ff4216a68a Use the PC label ID rather than '1'. Add support for thumb-2, because I heard that some people use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 22:44:15 +00:00
Jim Grosbach
68259145d9 ARM parsing/encoding for VCMP/VCMPE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 22:30:24 +00:00
Bill Wendling
f7e4aefd0f Check-pointing the new SjLj EH lowering.
This code will replace the version in ARMAsmPrinter.cpp. It creates a new
machine basic block, which is the dispatch for the return from a longjmp
call. It then shoves the address of that machine basic block into the correct
place in the function context so that the EH runtime will jump to it directly
instead of having to go through a compare-and-jump-to-the-dispatch bit. This
should be more efficient in the common case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 21:25:38 +00:00
Jim Grosbach
5cd5ac6ad4 ARM assembly parsing and encoding for VMRS/FMSTAT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 21:12:43 +00:00
Jim Grosbach
b95ed6ec46 Thumb2 ADD/SUB can take SP as a destination register.
It's documented as a separate instruction to line up with the Thumb1
encodings, for which it really is a distinct instruction encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141020 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 20:51:59 +00:00
Chad Rosier
2bfaf521ae Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions."
to appease nightly testers.  Not quite there yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 19:30:36 +00:00
Bill Wendling
2e6b97bbf8 No one should be using the method directly. Assert if they do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 12:47:34 +00:00
Bill Wendling
405ca137a1 Add a convenience method to tell if two things are equal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 12:44:28 +00:00
Bill Wendling
3320f2a3bf Use the ARMConstantPoolMBB class to handle the MBB values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 09:30:42 +00:00
Bill Wendling
9c18f51daa Add ARMConstantPoolMBB to hold an MBB value in the constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 09:19:10 +00:00
Bill Wendling
14a1a6b018 Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140941 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 09:05:12 +00:00
Bill Wendling
9aca75c4f8 Remove now dead methods and ivar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140940 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 09:04:18 +00:00
Bill Wendling
fe31e67350 Use the new ARMConstantPoolSymbol class to handle external symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 08:58:29 +00:00
Bill Wendling
ff4a8023ec Add an ARMConstantPool class for external symbols. This will split out the support for external symbols from the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 08:36:59 +00:00
Bill Wendling
3f4e4592c3 Remove now dead methods and ivar from ARMConstantPoolValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 08:02:05 +00:00
Bill Wendling
5bb779976a Switch over to using ARMConstantPoolConstant for global variables, functions,
and block addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 08:00:54 +00:00
Bill Wendling
3e944e38ea Some more refactoring.
* Add a couple of Create methods to the ARMConstantPoolConstant class,
* Add its own version of getExistingMachineCPValue, and
* Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 07:52:37 +00:00
Bill Wendling
029e93888d Add a Create method that accepts 'kind' and 'pcadj' arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 06:44:24 +00:00
Bill Wendling
f2b76aae2b Refactoring: Separate out the ARM constant pool Constant from the ARM constant
pool value.

It's not used right now, but will be soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 06:40:33 +00:00
Chad Rosier
5249041125 Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact
useful if an optimization assumes the stack has been realigned.  Credit to
Eli for his assistance.
rdar://10043857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 02:03:18 +00:00
Jakob Stoklund Olesen
c8e2bb68bb Store sub-class lists as a bit vector.
This uses less memory and it reduces the complexity of sub-class
operations:

- hasSubClassEq() and friends become O(1) instead of O(N).

- getCommonSubClass() becomes O(N) instead of O(N^2).

In the future, TableGen will infer register classes.  This makes it
cheap to add them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140898 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 22:19:07 +00:00
Jim Grosbach
f391e9f696 Correct for my over-eager delete finger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 22:02:45 +00:00
Bill Wendling
d98f838284 Constify 'isLSDA' and move a method out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 18:42:06 +00:00
Jim Grosbach
6f09fcf5da ARM Darwin default relocation model is PIC.
This matches clang, so default options in llc and friends are now closer to
clang's defaults.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:41:35 +00:00
Jim Grosbach
98602ac9a9 ARM Fixup valus for movt/movw are for the whole value.
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 17:23:05 +00:00