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9 Commits

Author SHA1 Message Date
Justin Holewinski
d662576671 PTX: Improve support for 64-bit addressing 
- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses
- Add comparison selection for i64
- Add zext selection for i32 -> i64
- Add shl/shr/sha support for i64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128153 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-23 16:58:51 +00:00
Che-Liang Chiou
88d3367baa ptx: add unconditional and conditional branch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127873 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 11:08:52 +00:00
Che-Liang Chiou
f48817cbf9 Add 64-bit addressing to PTX backend 
- Add '64bit' sub-target option.
- Select 32-bit/64-bit loads/stores based on '64bit' option.
- Fix function parameter order.

Patch by Justin Holewinski



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-02 07:36:48 +00:00
Che-Liang Chiou
fd8978b021 Extend initial support for primitive types in PTX backend 
- Allow i16, i32, i64, float, and double types, using the native .u16,
  .u32, .u64, .f32, and .f64 PTX types.
- Allow loading/storing of all primitive types.
- Allow primitive types to be passed as parameters.
- Allow selection of PTX Version and Shader Model as sub-target attributes.
- Merge integer/floating-point test cases for load/store.
- Use .u32 instead of .s32 to conform to output from NVidia nvcc compiler.

Patch by Justin Holewinski



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126824 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-02 03:20:28 +00:00
Che-Liang Chiou
8e5d01cd6e ptx: add passing parameter to kernel functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125279 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-10 12:01:24 +00:00
Che-Liang Chiou
c88e91b875 ptx: remove reg-reg addressing mode and st.const 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122653 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-01 11:58:58 +00:00
Che-Liang Chiou
fc7072c3c4 ptx: add ld instruction and test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122398 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 10:38:51 +00:00
Che-Liang Chiou
3f8e617891 ptx: add ld instruction 
support register and register-immediate addressing mode

todo: immediate and register-register addressing mode



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120407 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 07:34:44 +00:00
Eric Christopher
50880d08ec Add the exit instruction to the PTX target. 
Patch by Che-Liang Chiou <clchiou@gmail.com>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 18:52:28 +00:00