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Author SHA1 Message Date
Andrew Lenharth
1f347a318c Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23852 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 23:58:36 +00:00
Chris Lattner
eae6d648da Use a literal to define ineg instead of immzero 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23851 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 23:30:37 +00:00
Chris Lattner
cef6010c64 Fix a conditional so we don't access past the end of the range. Thanks to 
Andrew for bringing this to my attn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23850 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 22:50:10 +00:00
Andrew Lenharth
964b6aacb4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23849 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 19:39:24 +00:00
Andrew Lenharth
d684e1a64d add cttz and ctpop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23848 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 19:38:11 +00:00
Nate Begeman
c6a454e8d5 Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU 
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23846 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 17:45:03 +00:00
Chris Lattner
f75f2a0a02 don't use llabs with apparently VC++ doesn't have 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23845 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 17:01:00 +00:00
Chris Lattner
8317e12cef Fix order of eval problem from when I refactored this into a function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23844 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 16:56:40 +00:00
Andrew Lenharth
892ade722a Sounds good, finish the intop conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23843 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 14:42:48 +00:00
Nate Begeman
12a923408c Add some more patterns for i64 on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23842 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:51:08 +00:00
Chris Lattner
b0fa11ca41 add a new method, play around with some code. 
Fix a *bug* in the extendIntervalEndTo method.  In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do.  Now produce [0:30).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23841 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:39:25 +00:00
Chris Lattner
0692bbd991 add a new method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23840 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:37:59 +00:00
Chris Lattner
f5ce2678f6 Refactor some code, pulling it out into a function. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23839 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 06:06:30 +00:00
Chris Lattner
1e9f3af561 Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an 
inner loop like this:

LBB_RateConvertMono8AltiVec_2:  ; no_exit
        lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
        lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
        fmr f3, f3
        fadd f0, f2, f0
        fadd f3, f0, f3
        fcmpu cr0, f3, f1
        bge cr0, LBB_RateConvertMono8AltiVec_2  ; no_exit

to an inner loop like this:

LBB_RateConvertMono8AltiVec_1:  ; no_exit
        fsub f2, f2, f1
        fcmpu cr0, f2, f1
        fmr f0, f2
        bge cr0, LBB_RateConvertMono8AltiVec_1  ; no_exit

Doh! good catch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23838 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 04:47:10 +00:00
Chris Lattner
ae4be981b1 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23837 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 04:21:06 +00:00
Chris Lattner
d7cc4c407d simplify this a bit by using immediates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23836 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 03:57:03 +00:00
Nate Begeman
6957523b9d Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 02:15:44 +00:00
Nate Begeman
d32d4a93f6 Enable targets to say that integer divide is expensive, which will trigger 
an upcoming optimization in the DAG Combiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23834 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 02:14:14 +00:00
Andrew Lenharth
d97591a961 forgot this one 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23833 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 00:29:02 +00:00
Andrew Lenharth
4907d22a90 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23832 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 00:28:31 +00:00
John Criswell
9811ea4567 This fixes PR638: 
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23831 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 20:07:15 +00:00
Jim Laskey
538421411a Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 19:51:16 +00:00
John Criswell
3d92544261 Moved to Regression/Codegen/Generic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23829 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:52:52 +00:00
John Criswell
eb853a498f This is a generic test for all code generators. It originally came from 
Regression/Codegen/X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23826 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:51:07 +00:00
Nate Begeman
2d5aff761d Write patterns for the various shl and srl patterns that don't involve 
doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:42:01 +00:00
John Criswell
886eb39170 Force i386 code generation for an i386 specific test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23821 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:30:39 +00:00
Jim Laskey
0de8796e68 Push processor descriptions to the top of target and add command line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 13:34:52 +00:00
Chris Lattner
2f041d49a9 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23819 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:41:05 +00:00
Chris Lattner
f6cd147471 now that tblgen is smarter, use integers directly. This should help Andrew too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:32:04 +00:00
Chris Lattner
5d5a056092 Add basic support for integer constants in pattern results. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23817 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:30:56 +00:00
Chris Lattner
2ac8510d68 Fix some checking that was causing duraid to get a perplexing assertion 
instead of a happy error message


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23816 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:12:14 +00:00
Chris Lattner
4c59309f59 Add support for patterns that have physical registers in them. Testcase: 
def : Pat<(trunc G8RC:$in),
          (OR8To4 G8RC:$in, X0)>;

Even though this doesn't make any sense on PPC :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23815 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 02:07:26 +00:00
Chris Lattner
ab1bf27be5 Asserting here is to violent 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23814 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:55:23 +00:00
Chris Lattner
14c09b81ea teach ppc backend these are copies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:50:36 +00:00
Chris Lattner
e214979f79 Make this work with the internalize change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23812 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:41:47 +00:00
Chris Lattner
8be1fa5dc5 Convert these cases to patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:38:02 +00:00
Chris Lattner
0c0cfa741f Nate wants to define 'Pat's which turn into instructions that don't have 
patterns.  Certainly a logical request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23810 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:27:22 +00:00
Nate Begeman
8d94832394 Woo, it kinda works. We now generate this atrociously bad, but correct, 
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23809 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:12:32 +00:00
Chris Lattner
07c375d6f6 Testcase that crashes llvmgcc in type layout 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23806 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 00:52:21 +00:00
Chris Lattner
e5468305a0 apply some tblgen majik to simplify the X register definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 00:17:55 +00:00
Nate Begeman
5dc897b0e4 Teach Legalize how to do something with EXTRACT_ELEMENT when the type of 
the pair of elements is a legal type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23804 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 00:06:56 +00:00
Nate Begeman
da32c9eed6 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This 
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5 Add the ability to lower return instructions to TargetLowering. This 
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 23:23:37 +00:00
Chris Lattner
d222f6ab67 Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero 
sized stack object if either the array size or the type size is zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23801 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 22:14:06 +00:00
Chris Lattner
f46544cd82 new testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23798 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 22:13:39 +00:00
Chris Lattner
2dfa8192ab remove hack 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23797 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 22:11:42 +00:00
Chris Lattner
a1fa8f1d8a This was never updated for the project makefile changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23790 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 18:50:26 +00:00
Chris Lattner
ed069fcf88 This never got updated to reflect the project makefile changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23789 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 18:48:30 +00:00
Jim Laskey
21f587ca24 Simple edits; remove unimplimented cases and clarify long haul SLU cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac Fix the JIT encoding of LWA, LD, STD, and STDU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 16:51:22 +00:00