when there are immediates, let's not worry about the memory overhead of
this :)
* add addU64Imm(uint64_t val) to machineinstrbuilder
(seriously: this seems required to support 64-bit immediates cleanly. if it
_really_ gets on your nerves, feel free to pull it out ;) )
coming up next week: "all your floating point constants are belong to us"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21208 91177308-0d34-0410-b5e6-96231b3b80d8
fact that all ExternalSymbols are actually string literals with static storage.
Thus we don't have to do anything special to hold them and we certainly don't
have to copy string data around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18007 91177308-0d34-0410-b5e6-96231b3b80d8
useful when you have a reference like:
int A[100];
void foo() { A[10] = 1; }
In this case, &A[10] is a single constant and should be treated as such.
Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no
other operand type is.
This is another fine patch contributed by Jeff Cohen!!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17007 91177308-0d34-0410-b5e6-96231b3b80d8
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
methods take an int or unsigned value instead of int64_t.
Also, add an 'addImm' method to the MachineInstrBuilder class, because the
fact that the hardware sign or zero extends it does not/should not matter
to the code generator. Once the old sparc backend is removed the difference
can be eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11976 91177308-0d34-0410-b5e6-96231b3b80d8
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11357 91177308-0d34-0410-b5e6-96231b3b80d8
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
methods which have strangely different semantics in different backends,
and noone knew what any did.
Getting rid of these ALSO allows the dependence of MachineInstr.h on
MRegisterInfo.h to be removed, which makes me much happier, and probably
alkis too. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11287 91177308-0d34-0410-b5e6-96231b3b80d8
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
This substantially shrinks the size of each machine instruction, which should
make allocation faster and the cache footprint of the machine code lighter.
Here are some timings for code generation of the larger benchmarks we have.
This are timings of code generation phases of the X86 JIT, when compiled in
debug mode:
Before After Diff
164.gzip:
InstSel 0.0878 0.0722 -21.6%
RegAlloc 0.2031 0.1757 -15.6%
TOTAL 0.5585 0.4999 -11.7%
Ptrdist-bc:
InstSel 0.0878 0.0722 -21.6%
RegAlloc 0.2070 0.1933 - 7.1%
TOTAL 0.6972 0.6464 - 7.9%
197.parser:
InstSel 0.2148 0.2148 - 0.0%
RegAlloc 0.4941 0.4277 -15.5%
TOTAL 1.3749 1.2851 - 7.0%
175.vpr:
InstSel 0.2519 0.2109 -19.4%
RegAlloc 0.5976 0.5663 - 5.5%
TOTAL 1.6933 1.6347 - 3.5%
254.gap:
InstSel 1.1328 0.9921 -14.2%
RegAlloc 2.6933 2.4804 - 8.6%
TOTAL 7.7871 7.2499 - 7.4%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7622 91177308-0d34-0410-b5e6-96231b3b80d8
so get rid of the def/use parameters that were getting passed in.
**** This now changes the semantics of these methods to preserve the flags,
not clobber them!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7602 91177308-0d34-0410-b5e6-96231b3b80d8
* Document the MOTy namespace correctly for doxygen
* Eliminate usage of the MachineOpCode typedef, which should eventually
be eliminated entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6584 91177308-0d34-0410-b5e6-96231b3b80d8
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6342 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new isPCRelative modifier flag which should be used in place of MO_PCRelativeDisp type.
* Fix a bug in isPhysicalRegister
* Add new setOpcode and RemoveOperand methods
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5209 91177308-0d34-0410-b5e6-96231b3b80d8
MO_MachineRegister, we no longer distinguish Virtual vs. Machine registers
externally, they're ALL registers, all equal.
Registers are only differentiated whether they are >=
MRegisterInfo::FirstVirtual or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4823 91177308-0d34-0410-b5e6-96231b3b80d8
reading code much easier than just seeing "true, false" especially when
default parameters default one but not both arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4717 91177308-0d34-0410-b5e6-96231b3b80d8
instead record them as extra operands in the operands[] vector.
Also, move CallArgsDescriptor into this class instead of making it an
annotation on the machine instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4399 91177308-0d34-0410-b5e6-96231b3b80d8
by MachineInstr.
* Add a bunch of new methods to allow incremental addition of operands to the
machine instr instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4356 91177308-0d34-0410-b5e6-96231b3b80d8
- Inline methods that are mostly a single line anyway
- Eliminate several methods that were never called
- Group methods a bit more consistently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4329 91177308-0d34-0410-b5e6-96231b3b80d8
overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a
bitvector. Sped up LLC a little less than 10% in a debug build!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4261 91177308-0d34-0410-b5e6-96231b3b80d8
one Value with another one in all operands and implicit references
of the machine instruction.
Also add method MachineOperand::getVRegValueOrNull().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3307 91177308-0d34-0410-b5e6-96231b3b80d8
