a full 64-bit address, it must be adjusted to fit in the branch instruction's
immediate field. (This is only used in the reoptimizer, for now.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13608 91177308-0d34-0410-b5e6-96231b3b80d8
constant pool member's name.
This is intended to address Bug 333.
Also, fix an anachronistic usage of "M" as a parameter of type Function *.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13357 91177308-0d34-0410-b5e6-96231b3b80d8
Include SparcV9RegisterInfo.h.
Add a getRegisterInfo() accessor and SparcV9RegisterInfo instance, just like
on the X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13146 91177308-0d34-0410-b5e6-96231b3b80d8
functions for now). This automatically turns on the printing of machine
registers using their own real names, instead of goofy things like %mreg(42),
and allows us to migrate code incrementally to the new interface as we see fit.
The register file description it uses is hand-written, so that the register
numbers will match the ones that the SparcV9 target already uses.
Perhaps someday we'll tablegen it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13145 91177308-0d34-0410-b5e6-96231b3b80d8
This prepares us to be able to de-virtualize and de-abstract it, and
take the register allocator bits out and move them into the register allocator
proper...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13127 91177308-0d34-0410-b5e6-96231b3b80d8
documentation that this module needs to be made independent of the
register file description of the current target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13125 91177308-0d34-0410-b5e6-96231b3b80d8
of IntCC, FloatCC, and Special types.
Make SparcV9RegInfo::getRegClassIDOfRegType() return the right answer
if you ask for the class corresponding to SpecialRegType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13095 91177308-0d34-0410-b5e6-96231b3b80d8
the name of %fsr (as the comment in SparcV9RegClassInfo.h used to suggest)
you would walk off the end of the FloatCCRegName array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13070 91177308-0d34-0410-b5e6-96231b3b80d8
have non-long indices for sequential types. In order to avoid trying to figure
out how the v9 backend works, we'll just hack it in the preselection pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12647 91177308-0d34-0410-b5e6-96231b3b80d8
Move lowerselect pass to come after preselection. Move machine
code construction and stack slots pass to come right before instruction
selection. This is to help fix perlbmk.
Update comments.
Make the sequence of passes in addPassesToJITCompile look more like
the sequence of passes in addPassesToEmitAssembly, including support
for -print-machineinstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12614 91177308-0d34-0410-b5e6-96231b3b80d8
Otherwise, if you're in debugging mode, you get warnings for (apparently)
every immediate constant in the function during reg. allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12538 91177308-0d34-0410-b5e6-96231b3b80d8
Make an explicit call to it from runOnFunction() if we know we're supposed to
write into the global. This is lame (esp. the const_cast), but it solves
the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12291 91177308-0d34-0410-b5e6-96231b3b80d8
