Jim Grosbach
22378fd664
ARM assembly aliases for two-operand V[R]SHR instructions.
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rdar://11189467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 07:23:53 +00:00
Argyrios Kyrtzidis
541b2a4aa3
In MemoryBuffer::getOpenFile() make sure that the buffer is null-terminated if
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the caller requested a null-terminated one.
When mapping the file there could be a racing issue that resulted in the file being larger
than the FileSize passed by the caller. We already have an assertion
for this in MemoryBuffer::init() but have a runtime guarantee that
the buffer will be null-terminated, so do a copy that adds a null-terminator.
Protects against crash of rdar://11161822.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 04:23:56 +00:00
Jim Grosbach
b657a90929
ARM assembly parsing for 'msr' plain 'cpsr' operand.
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Plain 'cpsr' is an alias for 'cpsr_fc'.
rdar://11153753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 03:17:53 +00:00
Jakob Stoklund Olesen
9243c4f7c5
Pass the right sign to TLI->isLegalICmpImmediate.
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LSR can fold three addressing modes into its ICmpZero node:
ICmpZero BaseReg + Offset => ICmp BaseReg, -Offset
ICmpZero -1*ScaleReg + Offset => ICmp ScaleReg, Offset
ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
The first two cases are only used if TLI->isLegalICmpImmediate() likes
the offset.
Make sure the right Offset sign is passed to this method in the second
case. The ARM version is not symmetric.
<rdar://problem/11184260>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 03:10:56 +00:00
Bob Wilson
63246de686
Do not include multiple -arch options in CPPFLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05 00:35:55 +00:00
Michael J. Spencer
68f404d890
Fix -Wnon-virtual-dtor warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 22:34:55 +00:00
Akira Hatanaka
56ce6b3520
Reapply 154038 without the failing test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 22:16:36 +00:00
Owen Anderson
657a4e774c
Revert r154038. It was causing make check failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154054 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 21:18:58 +00:00
Pete Cooper
ef74ca6a41
REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub register indices on the source registers. No simple test case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 21:03:25 +00:00
Benjamin Kramer
e25a2bd2e3
Fix a C++11 UDL conflict.
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Still not fixed in the standard ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 20:33:56 +00:00
Pete Cooper
9751b81fc9
f16 FREM can now be legalized by promoting to f32
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 19:36:31 +00:00
Akira Hatanaka
e825fb3888
Fix LowerGlobalAddress to produce instructions with the correct relocation
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types for N32 ABI. Add new test case and update existing ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154038 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 19:02:38 +00:00
Akira Hatanaka
c75ceb7809
Fix LowerJumpTable to produce instructions with the correct relocation
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types for N32 ABI. Test case will be updated after the patch that fixes
TargetLowering::getPICJumpTableRelocBase is checked in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154036 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:31:32 +00:00
Akira Hatanaka
86a2733055
Fix LowerConstantPool to produce instructions with the correct relocation
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types for N32 ABI and update test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:26:12 +00:00
Jakob Stoklund Olesen
c5041cac7d
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
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A MOVCCr instruction can be commuted by inverting the condition. This
can help reduce register pressure and remove unnecessary copies in some
cases.
<rdar://problem/11182914>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154033 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:23:42 +00:00
Jakob Stoklund Olesen
1487cb3a5a
Remove spurious debug output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:23:38 +00:00
Akira Hatanaka
03d830e4f9
Fix LowerBlockAddress to produce instructions with the correct relocation
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types for N32 ABI and update test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:22:53 +00:00
Hongbin Zheng
99c8a5a64a
Add testcase for r154007, when a function has the optsize attribute,
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the loop should be unrolled according the value of OptSizeUnrollThreshold.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 13:24:40 +00:00
Rafael Espindola
26c8dcc692
Always compute all the bits in ComputeMaskedBits.
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This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 12:51:34 +00:00
Hongbin Zheng
00b73a5e44
LoopUnrollPass: Use variable "Threshold" instead of "CurrentThreshold" when
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reducing unroll count, otherwise the reduced unroll count is not taking
the "OptimizeForSize" attribute into account.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154007 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 11:44:08 +00:00
Benjamin Kramer
a95b4ebf3c
Move yaml::Stream's dtor out of line so it can see Scanner's dtor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 08:53:34 +00:00
Benjamin Kramer
32d1774d45
Implement DwarfLLVMRegPair::operator< without violating asymmetry.
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MSVC8 verifies this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 08:24:08 +00:00
Craig Topper
58609b7413
Convert assert(false) followed by a return to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 04:55:46 +00:00
Craig Topper
8d41a1a7e6
Remove default case from switch that was already covering all cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 04:42:42 +00:00
Pete Cooper
e5ae51a38f
Removed useless switch for default case when switch was covering all the enum values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 00:53:04 +00:00
Bob Wilson
a348fecf2f
Fix the install location for the Embedded makefile target.
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svn r145378 inadvertently changed the destination for the Embedded target
in the makefile. Add a "/Developer" suffix to DSTROOT to compensate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153980 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 23:44:39 +00:00
Michael J. Spencer
c35146b725
Sorry about that. MSVC seems to accept just about any random string you give it ;/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 23:36:44 +00:00
Bob Wilson
d13af63df7
Remove dead code for installing libLTO when building llvmCore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 23:13:26 +00:00
Michael J. Spencer
93210e847a
Add YAML parser to Support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153977 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 23:09:22 +00:00
Pete Cooper
2ce63c7352
Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 22:57:55 +00:00
Pete Cooper
dda3a099a0
Removed one last bad continue statement meant to be removed in r153914.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153975 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 22:18:49 +00:00
Bob Wilson
585d580acb
When building llvmCore, pass the SDKROOT and -arch setting to configure.
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So far all of configure tests have been run against the default SDK and
architecture, regardless of what is actually being built. We've gotten
lucky until now. <rdar://problem/11112479>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153972 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 21:50:26 +00:00
Bob Wilson
ac07407acb
Remove a reference to the C backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153971 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 21:50:24 +00:00
Chad Rosier
9dbb018b36
Fix an issue in SimplifySetCC() specific to vector comparisons.
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When folding X == X we need to check getBooleanContents() to determine if the
result is a vector of ones or a vector of negative ones.
I tried creating a test case, but the problem seems to only be exposed on a
much older version of clang (around r144500).
rdar://10923049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153966 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 20:11:24 +00:00
Anton Korobeynikov
1895fc90e0
Set soname for FreeBSD as well.
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Patch by Bernard Cafarelli!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153965 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 19:48:31 +00:00
Eric Christopher
fa5b050136
Fix thinko check for number of operands to be the one that actually
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might have more than 19 operands. Add a testcase to make sure I
never screw that up again.
Part of rdar://11026482
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 17:55:42 +00:00
Lang Hames
d5be48a9db
Matrix simplification in PBQP may push infinite costs onto register options.
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The colorability heuristic should count these as denied registers.
No test case - this exposed a bug on an out-of-tree target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153958 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 16:27:16 +00:00
Dylan Noblesmith
75e3b7fb8f
ARMDisassembler: drop bogus dependency on ARMCodeGen
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And indirectly, a dependency on most of the core LLVM optimization
libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153957 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 15:48:14 +00:00
Dylan Noblesmith
70debecde6
Object: drop bogus VMCore dependency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 15:48:10 +00:00
Bill Wendling
5fdf475697
The speedup doesn't appear to have been from this, but was an anomaly of my testing machine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 11:19:21 +00:00
Bill Wendling
f563fc35c8
Reserve space for the eventual filling of the vector. This gives a small speedup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153949 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 10:50:09 +00:00
Nadav Rotem
43b32e0cff
Add an additional testcase which checks ops with multiple users.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153939 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 07:39:36 +00:00
Anton Korobeynikov
9cd5e7a478
Make PPCCompilationCallbackC function to be static, so there will be no need to issue call via
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PLT when LLVM is built as shared library. This mimics the X86 backend towards the approach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153938 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 06:59:28 +00:00
Craig Topper
9b1b25f063
Tidy up spacing in some tablegen outputs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 06:52:47 +00:00
Craig Topper
769bbfd951
Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 05:20:24 +00:00
Bill Wendling
90e7d4f6f0
Reformatting. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153928 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 03:56:52 +00:00
Bill Wendling
cbece8c2a6
As Eric pointed out, even a Debug build should be equal. Leave the flag that can turn off comparisons though.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153927 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 03:27:43 +00:00
Akira Hatanaka
9dd16d41a2
Revert r153924. Delete test/MC/Disassembler/Mips and lib/Target/Mips/Disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 03:01:13 +00:00
Akira Hatanaka
02365945a6
Revert r153924. There were buildbot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 02:51:09 +00:00
Akira Hatanaka
885020a7a7
MIPS disassembler support.
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Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 02:20:58 +00:00