Andrew Lenharth
20c08e534f
move this fp select into a pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 12:49:07 +00:00
Dale Johannesen
7b9486ad43
Add an int64_t variant of abs, for host environments
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without one. Use it where we were using abs on
int64_t objects.
(I strongly suspect the casts to unsigned in the
fragments in LoopStrengthReduce are not doing whatever
the original intent was, but the obvious change to
uint64_t doesn't work. Maybe later.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 00:24:22 +00:00
Nate Begeman
7cee81703d
Add support to tablegen for naming the nodes themselves, not just the operands,
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in selectiondag patterns. This is required for the upcoming shuffle_vector rewrite,
and as it turns out, cleans up a hack in the Alpha instruction info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67286 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-19 05:21:56 +00:00
Chris Lattner
03a46989b6
silence warning when asserts disabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61013 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-14 21:37:33 +00:00
Dan Gohman
41474baac8
Add a sanity-check to tablegen to catch the case where isSimpleLoad
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is set but mayLoad is not set. Fix all the problems this turned up.
Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60459 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-03 02:30:17 +00:00
Andrew Lenharth
068d1c51cc
This shouldn't be necessary
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11 23:19:51 +00:00
Chris Lattner
e563bbc312
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
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parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-11 22:08:30 +00:00
Dan Gohman
f5aeb1a8e4
Rename ConstantSDNode::getValue to getZExtValue, for consistency
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with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 16:56:44 +00:00
Dan Gohman
67ca6be16a
Tablegen generated code already tests the opcode value, so it's not
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necessary to use dyn_cast in these predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55055 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 15:24:22 +00:00
Dan Gohman
475871a144
Rename SDOperand to SDValue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 21:46:04 +00:00
Mon P Wang
2887310630
Added MemOperands to Atomic operations since Atomics touches memory.
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Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 08:15:39 +00:00
Evan Cheng
da47e6e0d0
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:03:38 +00:00
Bill Wendling
6ef781f3ce
Final de-tabification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 06:33:05 +00:00
Andrew Lenharth
ab0b949e0e
Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 06:45:13 +00:00
Andrew Lenharth
22c5c1b2df
llvm.memory.barrier, and impl for x86 and alpha
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-16 01:24:58 +00:00
Chris Lattner
48be23cd65
rename SDTRet -> SDTNone.
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Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-15 22:02:54 +00:00
Chris Lattner
9b37aaf04c
get def use info more correct.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45821 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-10 05:12:37 +00:00
Chris Lattner
834f1ce031
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 23:38:27 +00:00
Chris Lattner
c8478d8b12
Change the 'isStore' inferrer to look for 'SDNPMayStore'
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instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45654 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 06:44:58 +00:00
Chris Lattner
4ee451de36
Remove attribution from file headers, per discussion on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
Evan Cheng
6e141fd048
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 23:12:09 +00:00
Andrew Lenharth
19914ed97f
something wrong with this opt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44370 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-27 18:31:30 +00:00
Bill Wendling
c69107ca11
Unifacalize the CALLSEQ{START,END} stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 09:19:02 +00:00
Bill Wendling
0f8d9c04d9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
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adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 00:44:25 +00:00
Owen Anderson
20ab29068d
Add a flag for indirect branch instructions.
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Target maintainers: please check that the instructions for your target are correctly marked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 07:39:39 +00:00
Evan Cheng
071a279e94
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:55:27 +00:00
Evan Cheng
ffbaccae02
No more noResults.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-21 00:34:19 +00:00
Evan Cheng
64d80e3387
Change instruction description to split OperandList into OutOperandList and
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InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Andrew Lenharth
15b7823006
Use this nifty Constraints thing and fix the inverted conditional moves
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36191 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 04:07:59 +00:00
Andrew Lenharth
3553d86731
FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33492 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 21:09:16 +00:00
Andrew Lenharth
913ab0574d
Be sure to grab weak functions too, and make implicit defs comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 17:39:14 +00:00
Chris Lattner
1331dec131
silence warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31394 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 01:18:29 +00:00
Andrew Lenharth
d079cdb6d3
fix 2006-11-01-vastart.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 03:05:26 +00:00
Andrew Lenharth
6bbf6b0b65
more shotenning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 23:46:56 +00:00
Andrew Lenharth
956a431930
Let us play simplify the td file (and fix a few missed sub and mul patterns).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 19:52:12 +00:00
Andrew Lenharth
f81173f70e
Add all that branch mangling niftiness
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31313 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 16:49:55 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Chris Lattner
93b8e490c4
adjcallstack up/down clobbers the sp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 18:00:14 +00:00
Chris Lattner
d615ded96e
Use cute tblgen tricks to make zap handling more powerful. Specifically,
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when the dag combiner simplifies an and mask, notice this and allow those bits
to be missing from the zap mask.
This compiles Alpha/zapnot4.ll into:
sll $16,3,$0
zapnot $0,3,$0
ret $31,($26),1
instead of:
ldah $0,1($31)
lda $0,-8($0)
sll $16,3,$1
and $1,$0,$0
ret $31,($26),1
It would be *really* nice to replace the hunk of code in the
AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into
(SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking
at alpha. Make andrew will do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-11 05:13:56 +00:00
Chris Lattner
78feeb0460
Remove dead/redundant instructions. These are handled by ZAPNOTi
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30872 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-11 04:12:39 +00:00
Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Andrew Lenharth
6b634037b3
catch constants more often
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30534 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-20 15:05:49 +00:00
Andrew Lenharth
ea4f9d5801
Jump tables on Alpha
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-18 18:01:03 +00:00
Evan Cheng
bb7b844bec
CALLSEQ_* produces chain even if that's not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:03:33 +00:00
Evan Cheng
043eb829cc
Remove a duplicate pattern/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 18:42:49 +00:00
Andrew Lenharth
f2b806a1aa
Let the alpha breakage begin. First Formals and RET. next Calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28753 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 18:09:24 +00:00
Andrew Lenharth
a5cc38bcbd
ignore ordered/unordered for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28679 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-04 00:25:51 +00:00
Andrew Lenharth
f87e7931fd
support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27370 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 04:19:17 +00:00
Andrew Lenharth
afe3f49815
mul by const conversion sequences. more coming soon
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 03:18:59 +00:00
Andrew Lenharth
e5b71d0715
fcopysign for mixed mode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26651 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-09 17:56:33 +00:00