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Author SHA1 Message Date
Andreas Bolka
c6a303052b Print pairwise dependence results, add testcases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74402 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-28 00:35:22 +00:00
Andreas Bolka
f35626d3cd Minimal LDA interface, maximally conservative tester. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74401 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-28 00:21:21 +00:00
Andreas Bolka
707207adae LDA analysis output scaffolding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74400 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-28 00:16:08 +00:00
Dan Gohman
f7ca1611e2 Don't try to split a loop when the controlling icmp instruction 
doesn't have an IV-based operand. This fixes PR4471.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74399 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 22:58:27 +00:00
Dan Gohman
a1baee20c4 Remove the block from the LoopInfo, rather than just the Loop. 
LoopInfo will handle removing it from the Loop, as well as updating
its own tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74398 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 22:32:36 +00:00
Dan Gohman
4b35f83b91 Teach LoopSimplify how to merge multiple loop exits into a single exit, 
when one of them can be converted to a trivial icmp and conditional
branch.

This addresses what is essentially a phase ordering problem.
SimplifyCFG knows how to do this transformation, but it doesn't do so
if the primary block has any instructions in it other than an icmp and
a branch. In the given testcase, the block contains other instructions,
however they are loop-invariant and can be hoisted. SimplifyCFG doesn't
have LoopInfo though, so it can't hoist them. And, it's important that
the blocks be merged before LoopRotation, as it doesn't support
multiple-exit loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74396 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 21:30:38 +00:00
Dan Gohman
cfb32203bc More minor code simplifications. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74395 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 21:23:40 +00:00
Dan Gohman
9d59d9f849 Eliminate a layer of indirection in LoopInfo and MachineLoopInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74394 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 21:22:48 +00:00
Dan Gohman
1c34375f79 Convert ScalarEvolution to use BumpPtrAllocator and FoldingSet, instead 
of a team of individual allocations and a team of std::maps.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74393 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 21:21:31 +00:00
Dan Gohman
0a928335fa Remove a redundant #include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74392 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 21:18:51 +00:00
Dan Gohman
267a385342 Change SCEVExpander to use an IRBuilder to emit instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74391 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 21:18:18 +00:00
Dan Gohman
1d3b26ac02 Add a 'const' in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74389 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 20:53:16 +00:00
Anton Korobeynikov
55ad1f22b4 Simplify a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74385 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 12:59:03 +00:00
Anton Korobeynikov
a98cbc554c ARM refactoring. Step 2: split RegisterInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 12:16:40 +00:00
Douglas Gregor
1b573d8b20 Add ThumbInstrInfo.cpp to the CMake makefiles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 07:44:59 +00:00
Chris Lattner
f7789c72bd remove a bunch of fixmes (old checking code) and commonize all the 
target-specific operand printing functionality.  Yay.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:46:24 +00:00
Chris Lattner
b1acd68fe4 pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:39:56 +00:00
Chris Lattner
4c1b606ecd simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:24:12 +00:00
Dan Gohman
de53dc03f5 When a value is used multiple times within a single PHI, instructions 
inserted to replace that value must dominate all of of the basic
blocks associated with the uses of the value in the PHI, not just
one of them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74376 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:16:57 +00:00
Chris Lattner
553e571b43 fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74375 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:50:14 +00:00
Chris Lattner
380135cc3e fix a bunch of failures in the X86-64 JIT by tolerating RIP as 
a base register.  We just ignore it for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:46:33 +00:00
Chris Lattner
74d3f50a80 factor some logic out into a helper function, allow remat of loads from constant 
globals.  This implements remat-constant.ll even without aggressive-remat.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:38:55 +00:00
Chris Lattner
18c5987fa3 Reimplement rip-relative addressing in the X86-64 backend. The new 
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:16:01 +00:00
Chris Lattner
600d006cc7 remove some unneeded eh info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:07:31 +00:00
Chris Lattner
1873d0c225 When doing remat, don't consider uses of non-allocatable physregs. Patch 
by Evan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74370 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:06:41 +00:00
Evan Cheng
9cb9e6778c Renaming for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74368 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 02:26:13 +00:00
Chris Lattner
18eed20051 testcase for PR4466 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74367 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 01:33:35 +00:00
Chris Lattner
89da699092 Fix PR4466 by making fastisel set operand flags correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74366 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 01:31:51 +00:00
Chris Lattner
5b93ea1ca3 fix a typo that GCC should have caught that causes crashes with -view-*-dags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74364 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 00:57:02 +00:00
David Goodwin
8eba8e0ca3 Remove outdated comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74357 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:39:02 +00:00
David Goodwin
dcdaebc592 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:13:13 +00:00
Dan Gohman
16bdfdb178 Add some testcases for some of the recent ScalarEvolution bug fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74353 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:54:11 +00:00
Dan Gohman
667d787c0a Incorporate the insertion point into the key of SCEVExpander's CSE map. 
This helps it avoid reusing an instruction that doesn't dominate all
of the users, in cases where the original instruction was inserted
before all of the users were known.  This may result in redundant
expansions of sub-expressions that depend on loop-unpredictable values
in some cases, however this isn't very common, and it primarily impacts
IndVarSimplify, so GVN can be expected to clean these up.

This eliminates the need for IndVarSimplify's FixUsesBeforeDefs,
which fixes several bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74352 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:53:46 +00:00
Devang Patel
acec7b35aa Remove unused routines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74351 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:53:22 +00:00
David Greene
343dadbb36 Add feature flags for AVX and FMA and fix some SSE4A feature flag 
initialization problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:46:54 +00:00
David Goodwin
7f98cac93a Thumb-2 tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74345 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:37:07 +00:00
Dan Gohman
9a80b459ed Fix ScalarEvolution::getAddRecExpr's code which canonicalized the 
nesting order of nested AddRec expressions to skip the transformation
if it would introduce an AddRec with operands not loop-invariant
with respect to its loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74343 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:36:20 +00:00
Daniel Dunbar
f7f02a9c7f NewNightlyTest.pl: Support -submit-aux with -no-submit (run that aux script, 
instead of skipping).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74341 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:33:28 +00:00
Bob Wilson
ff0d3392e0 Add missing argument for vtbx intrinsic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74340 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:27:22 +00:00
Dan Gohman
e890eead22 Fix SCEVAddRecExpr::isLoopInvariant to test if all of its operands 
are loop invariant, not just the start operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:17:21 +00:00
Chris Lattner
93677c99a4 remove unwind info, add test for asmprinting of jump table labels with (%rip) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74337 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:16:49 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:00:19 +00:00
Chris Lattner
d8220e5794 simplify printing of MO_ExternalSymbol in a non-pcrel context. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74334 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:47:27 +00:00
Bob Wilson
fd6d87d68a Add intrinsics for ARM NEON vtbl and vtbx operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74333 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:45:05 +00:00
Owen Anderson
2af72d455b Privatize some data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74332 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:45:04 +00:00
Owen Anderson
afe0a083c1 Constify this value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74330 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:39:56 +00:00
Anton Korobeynikov
d49ea77cbc Split thumb-related stuff into separate classes. 
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:28:53 +00:00
Chris Lattner
c4233af200 add %rip to the GR64 register class. Lets avoid allocating it to anything though! :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74328 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:25:00 +00:00
Chris Lattner
b903bed0fe Move all the TLS processing logic into isel, don't do it in asmprinter at all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74327 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:20:29 +00:00
Chris Lattner
ba8ef45d12 make sure to propagate operand flags in SelectTLSADDRAddr properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74326 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:18:37 +00:00