Commit Graph

5 Commits

Author SHA1 Message Date
Andrew Trick
1f8b48ab32 MI-Sched: Adjust regpressure limits for reserved regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-21 18:32:58 +00:00
Jakob Stoklund Olesen
c7a275245f Precompute some information about register costs.
Remember the minimum cost of the registers in an allocation order and
the number of registers at the end of the allocation order that have the
same cost per use.

This information can be used to limit the search space for
RAGreedy::tryEvict() when looking for a cheaper register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172280 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12 00:54:59 +00:00
Jakob Stoklund Olesen
39b5c0c049 Use MCPhysReg for RegisterClassInfo allocation orders.
This saves a bit of memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 03:34:17 +00:00
Jakob Stoklund Olesen
14d1dd95c7 Remove RegisterClassInfo::isReserved() and isAllocatable().
Clients can use the equivalent functions in MRI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 22:41:03 +00:00
Andrew Trick
1525260b3e Move RegisterClassInfo.h.
Allow targets to access this API. It's required for RegisterPressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 20:29:31 +00:00