Bill Wendling
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620d0cc7ac
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* Correct encoding for VSRI.
* Add tests for VSRI and VSLI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127297 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-09 00:33:17 +00:00 |
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Bill Wendling
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c04a9dea78
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Correct the encoding for VRSRA and VSRA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127294 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-09 00:00:35 +00:00 |
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Bill Wendling
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7c6b608a7c
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* Fix VRSHR and VSHR to have the correct encoding for the immediate.
* Update the NEON shift instruction test to expect what 'as' produces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127293 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-08 23:48:09 +00:00 |
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Bill Wendling
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591432136c
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A few more tests for instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127209 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-08 02:51:48 +00:00 |
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Bill Wendling
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3116dce338
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Rename the narrow shift right immediate operands to "shr_imm*" operands. Also
expand the testing of the narrowing shift right instructions.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127193 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-07 23:38:41 +00:00 |
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Bill Wendling
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a656b63ee4
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Narrow right shifts need to encode their immediates differently from a normal
shift.
16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-01 01:00:59 +00:00 |
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Bob Wilson
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8d1b7e57e5
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Fix misspelled target triples in MC/ARM test commands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121901 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-12-15 22:14:01 +00:00 |
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Owen Anderson
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95b9766fea
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Use ARM-style comment syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117941 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-11-01 18:33:37 +00:00 |
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Jim Grosbach
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833c93c795
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Mark ARM subtarget features that are available for the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-11-01 16:59:54 +00:00 |
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Owen Anderson
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b8d14a6611
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Convert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117900 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-11-01 05:23:58 +00:00 |
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