Commit Graph

48 Commits

Author SHA1 Message Date
Sean Silva
3f7b7f8ce0 tblgen: Use semantically correct RTTI functions.
Also, some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10 20:24:47 +00:00
Sean Silva
6cfc806a6b tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10 20:24:43 +00:00
Sean Silva
736ceace11 tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>.
This is a mechanical change of dynamic_cast<> to dyn_cast<>. A number of
these uses are actually more like isa<> or cast<>, and will be changed
to the semanticaly appropriate one in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05 03:31:58 +00:00
Jim Grosbach
9bb938c540 TableGen: Add initializer.
Keep GCC's warnings happy. It can't reason out that the state machine won't
ever hit the potentially uninitialized use in OPC_FilterValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17 18:00:53 +00:00
Michael Liao
307525cd24 Re-work bit/bits value resolving in tblgen
- This patch is inspired by the failure of the following code snippet
  which is used to convert enumerable values into encoding bits to
  improve the readability of td files.

  class S<int s> {
    bits<2> V = !if(!eq(s, 8),  {0, 0},
                !if(!eq(s, 16), {0, 1},
                !if(!eq(s, 32), {1, 0},
                !if(!eq(s, 64), {1, 1}, {?, ?}))));
  }

  Later, PR8330 is found to report not exactly the same bug relevant
  issue to bit/bits values.

- Instead of resolving bit/bits values separately through
  resolveBitReference(), this patch adds getBit() for all Inits and
  resolves bit value by resolving plus getting the specified bit. This
  unifies the resolving of bit with other values and removes redundant
  logic for resolving bit only. In addition,
  BitsInit::resolveReferences() is optimized to take advantage of this
  origanization by resolving VarBitInit's variable reference first and
  then getting bits from it.

- The type interference in '!if' operator is revised to support possible
  combinations of int and bits/bit in MHS and RHS.

- As there may be illegal assignments from integer value to bit, says
  assign 2 to a bit, but we only check this during instantiation in some
  cases, e.g.

  bit V = !if(!eq(x, 17), 0, 2);

  Verbose diagnostic message is generated when invalid value is
  resolveed to help locating the error.

- PR8330 is fixed as well.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 23:32:48 +00:00
Craig Topper
8cd9eaef01 Declare some for loop indices inside the for loop statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 05:42:16 +00:00
Craig Topper
c056483fc6 Fix up indentation of outputted decode function for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 05:16:15 +00:00
Benjamin Kramer
95d235ddb6 Fix a const violation in the generated disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 10:26:44 +00:00
Jim Grosbach
fc1a161d76 Switch the fixed-length disassembler to be table-driven.
Refactor the TableGen'erated fixed length disassemblmer to use a
table-driven state machine rather than a massive set of nested
switch() statements.

As a result, the ARM Disassembler (ARMDisassembler.cpp) builds much more
quickly and generates a smaller end result. For a Release+Asserts build on
a 16GB 3.4GHz i7 iMac w/ SSD:

Time to compile at -O2 (averaged w/ hot caches):
  Previous: 35.5s
  New:       8.9s

TEXT size:
  Previous: 447,251
  New:      297,661

Builds in 25% of the time previously required and generates code 66% of
the size.

Execution time of the disassembler is only slightly slower (7% disassembling
10 million ARM instructions, 19.6s vs 21.0s). The new implementation has
not yet been tuned, however, so the performance should almost certainly
be recoverable should it become a concern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-14 19:06:05 +00:00
Jakob Stoklund Olesen
6f36fa981a Write llvm-tblgen backends as functions instead of sub-classes.
The TableGenBackend base class doesn't do much, and will be removed
completely soon.

Patch by Sean Silva!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11 15:37:55 +00:00
Silviu Baranga
545b962f15 Second part for the 153874 one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 15:46:46 +00:00
Craig Topper
5a4c790c06 More const-correcting of FixedLenDecoderEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 06:52:56 +00:00
Craig Topper
eb5cd61070 Const-correct the FixedLenDecoderEmitter. Pass a few things by const reference instead of value to avoid some copying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 05:58:09 +00:00
Craig Topper
d936045625 Spacing fixes. Mostly aligning arguments that spilled onto next line with the opening parenthese instead of 2 spaces in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152889 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 01:19:24 +00:00
Craig Topper
797ba55e20 Remove unused field NumVariable from Filter class. Even it was needed the same result could be found with VariableInstructions.size(). Also fix some typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16 00:56:01 +00:00
Craig Topper
c007ba86f3 Remove unused field from FixedLenDecoderEmitter. Move NumberedInstructions declaration from class to run method since its only used there and was being reinitialized anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13 06:39:00 +00:00
Jim Grosbach
9c826d2d3c Tidy up. 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29 22:07:56 +00:00
James Molloy
3015dfb7d7 Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150169 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 10:56:31 +00:00
Craig Topper
655b8de7b2 Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 07:21:30 +00:00
Owen Anderson
684dfcf724 Fix unused variable warning in the rare circumstance that we have no feature-dependent instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 16:56:47 +00:00
Peter Collingbourne
7c78888887 Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 16:41:13 +00:00
Bob Wilson
1cea66c3ba Subtarget getFeatureBits() returns a uint64_t, not unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 02:47:54 +00:00
Eli Friedman
64a17b309d Make sure to handle the case where emitPredicateMatch returns false. Noticed by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 21:00:31 +00:00
James Molloy
0d76b19919 Fix warning on windows; use of comparison with bool argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 08:12:01 +00:00
Andrew Trick
22b4c819d4 Fix a use of freed string contents.
Speculatively try to fix our windows testers with a patch I found on the internet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139279 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 05:25:49 +00:00
Andrew Trick
ed968a9a04 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139278 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 05:23:14 +00:00
James Molloy
a5d5856854 Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 19:42:28 +00:00
Owen Anderson
83e3f67fb6 Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
Patch by James Molloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:44:15 +00:00
Owen Anderson
438f68df35 Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly checking the success result of custom decoder hooks on singleton decodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:05:23 +00:00
Owen Anderson
cf6039548b Make the FixedLengthDecoderEmitter smart enough to autogenerate decoders for encodings like "let Inst{11-7} = foo;", where the RHS has no bitwidth specifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 22:45:43 +00:00
Owen Anderson
5f801ba6ef The FixedLenDecoder needs to gracefully handle failing per-instruction decoder hooks in addition to per-operand decoder hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 20:06:49 +00:00
Owen Anderson
7f76baed5e Enhance the fixed length disassembler to better handle operand decoding failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 18:44:37 +00:00
Owen Anderson
eb809f562e Correctly handle scattered operands where the bits of the operand are contiguous, but out of order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 23:01:18 +00:00
David Greene
05bce0beee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:43:06 +00:00
David Greene
f37dd02f77 [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:05 +00:00
Owen Anderson
ea2429896a Third time's the charm for implementing tied operand decoding properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 18:28:52 +00:00
Owen Anderson
d217da1131 Fix a case where, when trying to track tied operands, we'd accidentally overwrite our mapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136467 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 17:32:03 +00:00
Owen Anderson
00ef6e3a30 Enhance the fixed-length decoder emitter to support tied operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 23:56:20 +00:00
Owen Anderson
d1e38dfb8d Enhance the fixed-length decoder emitter to support parsing scattered fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 21:54:31 +00:00
Owen Anderson
f1a0090073 Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135524 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 21:06:00 +00:00
Eric Christopher
d568b3f552 Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 23:06:52 +00:00
David Greene
d4a9066c93 [AVX] Make Inits Foldable
Manage Inits in a FoldingSet.  This provides several benefits:

- Memory for Inits is properly managed

- Duplicate Inits are folded into Flyweights, saving memory

- It enforces const-correctness, protecting against certain classes
  of bugs

The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen.  This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134907 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 18:25:51 +00:00
Jim Grosbach
806fcc040e Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:33:38 +00:00
Owen Anderson
bea6f615ee Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133940 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 21:06:21 +00:00
Owen Anderson
57557155c9 Enhance the fixed-length disassembler to support the callbacks necessary for symbolic disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18 18:42:26 +00:00
Chris Lattner
7a2bdde0a0 Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 05:18:47 +00:00
Owen Anderson
4dd27ebcc2 Ignore isCodeGenOnly instructions when generating diassembly tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14 20:58:49 +00:00
Owen Anderson
d8c87888a7 Add FixedLenDecoderEmitter, the skeleton of a new disassembler emitter for fixed-length instruction encodings.
A major part of its (eventual) goal is to support a much cleaner separation between disassembly callbacks
provided by the target and the disassembler emitter itself, i.e. not requiring hardcoding of knowledge in tblgen
like the existing disassembly emitters do.

The hope is that some day this will allow us to replace the existing non-Thumb ARM disassembler and remove
some of the hacks the old one introduced to tblgen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18 21:51:29 +00:00