Commit Graph

4842 Commits

Author SHA1 Message Date
Alp Toker
ca179f4de8 lit: Provide source locations in cfg files with older Python versions
This commit prospectively brings the benefits of r198766 to older supported
Python versions (2.5+).

Tested with Python 2.6, 2.7, 3.1 and 3.3 (!)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-11 14:34:18 +00:00
Alp Toker
4c28d2024f lit: execfile() isn't present in Python 3.3
On the other hand, exec(compile()) doesn't work in older Python versions in the
2.x series.

This commit introduces exec(compile()) with a fallback to plain exec(). That'll
hopefully hit the sweet spot in terms of version support.

Followup to r198766 which added enhanced source locations for lit cfg parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199006 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-11 13:27:28 +00:00
Roman Divacky
af43b47c5a Constant propagate MachineInstrClassName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198969 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-10 22:59:49 +00:00
Rafael Espindola
dd86e54b61 All backends use MC now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198959 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-10 21:49:27 +00:00
NAKAMURA Takumi
f1a1e4a723 Sink add_llvm_library(gtest_main) to UnitTestMain/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-10 11:02:26 +00:00
Kostya Serebryany
ab39685c77 reapply r198858: Disable LeakSanitizer in TableGen binaries, see PR18325; this time LeakSanitizerIsTurnedOffForTheCurrentProcess is used instead of __lsan_is_turned_off
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-10 08:05:42 +00:00
Alp Toker
d92ff21d6f Revert "Disable LeakSanitizer in TableGen binaries, see PR18325"
To declare or define reserved identifers is undefined behaviour in standard
C++. This needs to be addressed in compiler-rt before it can be used in LLVM.

See the list discussion for details.

This reverts commit r198858.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198884 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 19:40:55 +00:00
Kostya Serebryany
c50299bab6 Disable LeakSanitizer in TableGen binaries, see PR18325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198858 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 09:26:26 +00:00
Alp Toker
598887906b lit: Provide file location in cfg error messages
Python doesn't do a good job at diagnosing string exec() so use execfile()
where available.

This should be a timesaver when trying to get to the bottom of build bot
failures.

Before:

    File "llvm/utils/lit/lit/TestingConfig.py", line 93, in load_from_path
      exec("exec data in cfg_globals")
    File "<string>", line 1, in <module>
    File "<string>", line 194, in <module>
  NameError: name 'typo' is not defined

After:

    File "llvm/utils/lit/lit/TestingConfig.py", line 95, in load_from_path
    execfile(path, cfg_globals)
    File "clang/test/lit.cfg", line 194, in <module>
      typo
      ^~~~
  NameError: name 'typo' is not defined

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198766 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 14:20:59 +00:00
David Woodhouse
aab59870a4 [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.

Hm, perhaps we do need an AdSize16 bit after all?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:24 +00:00
Craig Topper
c8fd2c57c8 The rest of r198588. Remove SegOvrBits from X86 TSFlags since they weren't being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198589 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:57:27 +00:00
Craig Topper
adb7d3b49b Use patterns to remove some duplicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198550 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 06:55:48 +00:00
Craig Topper
6a69266fed Fix encoding for PUSH64i16. Add In64BitMode Predicate. Remove disassembler hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198547 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 05:46:38 +00:00
Craig Topper
09104ff9df Remove no longer needed x86 disassembler hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198546 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 05:10:07 +00:00
Craig Topper
01cb7fa977 Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198545 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 04:55:55 +00:00
Craig Topper
2b5dc93948 Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode and remove disassmbler table emitter hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 04:32:42 +00:00
Craig Topper
527f132627 Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198543 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 04:17:28 +00:00
Craig Topper
e43a0f8015 Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198530 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 01:35:51 +00:00
Craig Topper
62fe07a1ac Don't use PrintFatalError(which calls exit) for 'Primary decode conflict'. Just skip emitting the table. This way the main function will delete the output file instead of it remaining empty and confusing dependency checks if build is invoked a second time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198529 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 01:34:12 +00:00
Craig Topper
29d56f68c6 Tag x86 move to/from debug/control registers with Not64BitMode/In64BitMode. Remove disassembler hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198515 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 22:29:41 +00:00
Craig Topper
030ceadd69 Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198475 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 05:09:27 +00:00
Adrian Prantl
609ad7ec44 FileCheck: Print a nice error message for missing closing ']' in regex vars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198449 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 21:49:09 +00:00
Hal Finkel
6fa9961327 [TableGen] Handle ValueType in CodeGenDAGPatterns GetNumNodeResults
A ValueType in a pattern dag is a type cast, and GetNumNodeResults should
handle it (the type cast has only one result).

This comes up, for example, during the type checking of pattern fragments, for
example, AArch64's Neon_combine_2d fragment is:
  dag Operands = (ops node:$Rm, node:$Rn);
  dag Fragment = (v2f64 (concat_vectors (v1f64 node:$Rm), (v1f64 node:$Rn)));

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 20:47:05 +00:00
Craig Topper
d573aba8e1 Mark REX64_PREFIX as In64BitMode, remove hack from X86RecognizableInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:12:10 +00:00
Craig Topper
163868fec5 Remove unused HasFROperands field from disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198332 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 18:44:21 +00:00
Craig Topper
a7133ee752 Mark PUSHFS64/PUSHGS64/POPFS64/POPGS64 as In64BitMode and remove the hack from the disassembler table builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198327 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 18:20:48 +00:00
Craig Topper
d4e0bc4316 Remove unnecessary stirng comparison from disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198325 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 17:41:40 +00:00
Craig Topper
e625100c6a Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler table builder doesn't need to string match them to exclude them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 17:28:14 +00:00
Craig Topper
e61c70a085 Remove unused function argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198291 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 03:58:45 +00:00
Craig Topper
5cfd40ccd4 Remove modifierType/Base from X86 disassembler tables as they are no longer used. Removes ~11.5K from static tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198284 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 21:52:57 +00:00
Craig Topper
95a3ccdd80 Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are really more like OrRegFrm so we don't need a difference since we can just mask bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198278 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 15:29:32 +00:00
Elena Demikhovsky
3062a311ac AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp
Printing rounding control.
Enncoding for EVEX_RC (rounding control).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 15:12:34 +00:00
Craig Topper
979b2cd2bc Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 14:22:37 +00:00
Craig Topper
5cbbd7e1a5 Revert r198238 and add FP disassembler tests. It didn't work and I didn't realized we had no FP disassembler test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 17:21:44 +00:00
Craig Topper
e6d2dce7ab Remove special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 19:16:48 +00:00
Craig Topper
d7109840cd Remove EscapeFilter. It's funcionality can be covered by correctly using ExtendedFilter and ExactFilter. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 17:37:10 +00:00
Craig Topper
d2f307195a Simplify filter accepts function to just return 'condition' instead of branching to return true/false. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198221 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 17:22:20 +00:00
NAKAMURA Takumi
e18e76e424 [CMake] Generate ${BUILD_MODE}/llvm-lit for each ${CMAKE_CONFIGURATION_TYPES}.
llvm-lit can be invoked;

  $ Release/bin/llvm-lit

instead of;

  $ bin/llvm-lit --param buid_mode=Release

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198206 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 07:02:12 +00:00
Alp Toker
9c7316f760 Python compatibility fix for r198150
Remove the stat call error reporting for now.

It wasn't essential so silent fallback should be fine here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198155 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-29 06:51:10 +00:00
Alp Toker
aa29cf421a Prospective Python 3 fix for r198150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198152 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-29 05:51:07 +00:00
Alp Toker
9ad6e339c3 lit: Incremental test scheduling
Add option -i to prioritize test runs by source file modification time and
previous failure state.

This optimal scheduling reduces typical test-and-fix iteration times to a
matter of seconds by rapidly answering the questions:

  1) Did my recent change fix tests that were previously failing?
  2) Do the tests I just wrote / modified still work?

The current implementation requires write permissions to the source tree
because it uses mtimes to track failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-29 05:09:05 +00:00
Elena Demikhovsky
09a63715ce AVX-512: decoder for AVX-512, made by Alexey Bader.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198013 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 11:40:51 +00:00
NAKAMURA Takumi
69475dd92b Install three utils, "FileCheck", "count", and "not", for now to appease llvmlab dragonegg builder.
Since r197684, "install/bin/llvm-config --obj-root" hasn't shown the build tree. The builder was finding utils in the build tree, from the installed tree.

I will revert this after dragonegg builder would be tweaked not to use installed llvm-config.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197786 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20 06:25:37 +00:00
Eric Christopher
75a8b23e10 [x86] Rename In32BitMode predicate to Not64BitMode
That's what it actually means, and with 16-bit support it's going to be
a little more relevant since in a few corner cases we may actually want
to distinguish between 16-bit and 32-bit mode (for example the bare 'push'
aliases to pushw/pushl etc.)

Patch by David Woodhouse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197768 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20 02:04:49 +00:00
Hal Finkel
d715c3e9ac Add support for positionally-encoded operands to FixedLenDecoderEmitter
Unfortunately, the PowerPC instruction definitions make heavy use of the
positional operand encoding heuristic to map operands onto bitfield variables
in the instruction definitions. Changing this to use name-based mapping is not
trivial, however, because additional infrastructure needs to be designed to
handle mapping of complex operands (with multiple suboperands) onto multiple
bitfield variables.

In the mean time, this adds support for positionally encoded operands to
FixedLenDecoderEmitter, so that we can generate a disassembler for the PowerPC
backend. To prevent an accidental reliance on this feature, and to prevent an
undesirable interaction with existing disassemblers, a backend must opt-in to
this support by setting the new decodePositionallyEncodedOperands
instruction-set bit to true.

When enabled, this iterates the variables that contribute to the instruction
encoding, just as the encoder does, and emulates the procedure the encoder uses
to map "numbered" operands to variables. The bit range for each variable is
also determined as the encoder determines them. This map is then consulted
during the decoder-generator's loop over operands to decode, allowing the
decoder to understand both position-based and name-based operand-to-variable
mappings.

As noted in the comment on the decodePositionallyEncodedOperands definition,
this support should be removed once it is no longer needed. There should be no
change to existing disassemblers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197691 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 16:12:53 +00:00
Hal Finkel
e14ad8538f Add support for PointerLikeRegClass to FixedLenDecoderEmitter
This is more prep for adding the PowerPC disassembler. FixedLenDecoderEmitter
should recognize PointerLikeRegClass operands as register types, and generate
register-like decoding calls instead of treating them like immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197680 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 14:58:22 +00:00
Hal Finkel
af73dfe6f1 Support little-endian encodings in the FixedLenDecoderEmitter
The convention used to specify the PowerPC ISA is that bits are numbered in
reverse order (0 is the index of the high bit). To support this "little endian"
encoding convention, CodeEmitterGen will reverse the bit numberings prior to
generating the encoding tables. In order to generate a disassembler,
FixedLenDecoderEmitter needs to do the same.

This moves the bit reversal logic out of CodeEmitterGen and into CodeGenTarget
(where it can be used by both CodeEmitterGen and FixedLenDecoderEmitter). This
is prep work for disassembly support in the PPC backend (which is the only
in-tree user of this little-endian encoding support).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197532 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 22:37:50 +00:00
NAKAMURA Takumi
04ca26908e Tweak lit/TestingConfig.py Py3-compatible. has_key is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197462 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 04:14:50 +00:00
Reid Kleckner
83fdac1248 Add missing trailing comma in llvm-lit.in
I was testing a stale bin/llvm-lit, which now lives at bin/llvm-lit.py
on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197446 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 00:55:31 +00:00
Reid Kleckner
b20feb9980 Add the lit site config for unittests to bin/llvm-lit
This missing parameter was causing bin/llvm-lit to run the unittests
from my primary build directory instead of my self-hosting build
directory because llvm-config was on my PATH.

This more closely matches what 'make check' will pass to lit.py.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 00:33:36 +00:00