(1) Ensure that delay slot instructions are not moved out of place (this
was happening for some CALL instructions). Basically, we need to
move all delay slot instructions out of the graph and handle them
along with the delayed control transfer instruction.
(2) Mark scheduled instructions correctly when instructions are scheduled
in more than one cycle in a single step (due to delay slots).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@678 91177308-0d34-0410-b5e6-96231b3b80d8
Value to a vector instead of a list.
Move SchedGraph.h & SchedPriorities.h into lib/CodeGen/InstrScheduling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@572 91177308-0d34-0410-b5e6-96231b3b80d8
Move files from lib/CodeGen/TargetMachine to lib/Target
Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h}
Prepare to split TargetMachine.h into several smaller files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@566 91177308-0d34-0410-b5e6-96231b3b80d8
1. Clean up the TargetMachine structure. No more wierd pointers that have to
be cast around and taken care of by the target.
2. Instruction Scheduling now takes the schedinfo as an argument. The same
should be done with the instinfo, it just isn't now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@565 91177308-0d34-0410-b5e6-96231b3b80d8
