Evan Cheng
f6fe957950
Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub fp, #c.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76401 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 06:59:32 +00:00
Evan Cheng
b46aaa3874
Fix a regression from 76124. Thumb1 instructions default to S bit being true.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76374 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:16:46 +00:00
Anton Korobeynikov
b8e9ac834a
Emit cross regclass register moves for thumb2.
...
Minor code duplication cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 23:26:06 +00:00
Evan Cheng
378445303b
Let callers decide the sub-register index on the def operand of rematerialized instructions.
...
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 09:20:10 +00:00
Owen Anderson
9adc0abad3
Move EVER MORE stuff over to LLVMContext.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 23:09:55 +00:00
Torok Edwin
c23197a26f
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
...
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 16:55:14 +00:00
Evan Cheng
446c428bf3
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
...
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 06:43:01 +00:00
Torok Edwin
dac237e182
Implement changes from Chris's feedback.
...
Finish converting lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:53:28 +00:00
David Goodwin
77521f5232
Generalize opcode selection in ARMBaseRegisterInfo.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:28:28 +00:00
David Goodwin
db5a71a8e0
Push methods into base class in preparation for sharing.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:31:39 +00:00
Torok Edwin
ab7c09b6b6
Start converting to new error handling API.
...
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:01:40 +00:00
David Goodwin
b50ea5c48f
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 22:18:33 +00:00
