Nate Begeman
368e18d56a
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Evan Cheng
77dea9b3c3
MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 19:34:41 +00:00
Duraid Madina
00d3d44b75
distinguish between objects and register names, now we can have stuff
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with names like "f84", "in6" etc etc.
this should fix one or two tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 13:12:57 +00:00
Evan Cheng
298ebf2bd8
If the false case is the current basic block, then this is a self loop.
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We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop. Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.
Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 08:27:56 +00:00
Evan Cheng
d51425a82d
Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
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transfer.
According to the Intel P4 Optimization Manual:
Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.
Not to mention movaps is shorter than movss.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 01:50:02 +00:00
Evan Cheng
18a8452f3d
A bit more memset / memcpy optimization.
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Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26224 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 00:21:07 +00:00
Evan Cheng
fe1c31204e
Remove an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 22:14:34 +00:00
Chris Lattner
5946fef1db
new test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26217 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 19:52:06 +00:00
Chris Lattner
45090476be
Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires
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it, because this:
.bss
X:
.byte 0
results in the assembler warning: "initialization in bss segment". Annoying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 07:07:14 +00:00
Chris Lattner
6fa1f57c66
Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.
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The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 06:41:34 +00:00
Evan Cheng
2354f5a46b
Remove an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26197 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 01:56:48 +00:00
Evan Cheng
17ef92eda7
Use .zerofill on x86/darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26196 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 01:56:23 +00:00
Evan Cheng
f3f0a9c587
cvtsd2ss / cvtss2sd encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26193 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 00:31:03 +00:00
Evan Cheng
7335f9beea
movaps, movapd encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26192 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 00:11:37 +00:00
Chris Lattner
ae302ab9cb
new note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26186 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 22:19:54 +00:00
Chris Lattner
0d7db6f79a
If we have zero initialized data with external linkage, use .zerofill to
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emit it (instead of .space), saving a bit of space in the .o file.
For example:
int foo[100];
int bar[100] = {};
when compiled with C++ or -fno-common results in shrinkage from 1160 to 360
bytes of space. The X86 backend can also do this on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26185 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 22:18:23 +00:00
Evan Cheng
ee50a1ae27
Don't special case XS, XD prefixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26183 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 21:52:51 +00:00
Evan Cheng
576c141921
Bug fix: XS, XD prefixes were being emitted twice.
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XMM registers were not being handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26182 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 21:45:24 +00:00
Chris Lattner
33d5082779
Make sure that weak functions are aligned properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26181 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 20:42:33 +00:00
Evan Cheng
ddf7532442
Duh
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26180 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 20:37:37 +00:00
Evan Cheng
968c178172
Remove -disable-x86-sse
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26179 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 20:30:14 +00:00
Evan Cheng
a03a5dc7ce
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:38:30 +00:00
Evan Cheng
952b7d6a1e
Add a entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26173 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:25:32 +00:00
Evan Cheng
87ed716d21
Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and
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maxStoresPerMemMove. Although the last one is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26172 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:25:08 +00:00
Evan Cheng
82eaf628b4
Enable SSE (for the right subtargets)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26169 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:07:58 +00:00
Chris Lattner
f9a05329a1
Another hack due to allowing multiple symbols with the same name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26150 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 22:22:42 +00:00
Andrew Lenharth
40ec5037fa
improved zap discovery
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26148 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 18:52:29 +00:00
Chris Lattner
94dd29216c
Switch targets over to using SelectionDAG::getCALLSEQ_START to create
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CALLSEQ_START nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 09:00:43 +00:00
Chris Lattner
45b3976db7
Switch to using getCALLSEQ_START instead of using our own creation calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26142 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 08:55:29 +00:00
Nate Begeman
789fd42320
Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/
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PowerPC/and-imm.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-12 09:09:52 +00:00
Duraid Madina
b20f97959e
fix storing booleans (grawp missed this one)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26120 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-11 07:33:17 +00:00
Duraid Madina
631a140054
now short immediates will get matched (previously constants were all
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triggering movl 64bit imm fat instructions)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-11 07:32:15 +00:00
Evan Cheng
2486af1b53
Prevent certain nodes that have already been selected from being folded into
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X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-11 02:05:36 +00:00
Evan Cheng
23addc061c
Nicer code. :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26111 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 22:46:26 +00:00
Evan Cheng
f597dc78f8
Added X86 isel debugging stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 22:24:32 +00:00
Chris Lattner
ad7a3e6208
Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr
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intrinsics.
Autogen frameindex matcher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 07:35:42 +00:00
Chris Lattner
f613fcb741
Update to new-style flags usage, simplifying the .td file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26106 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 06:58:25 +00:00
Evan Cheng
c57e5c17bc
Remove a completed entry; add a new entry about fisttp op
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 05:48:15 +00:00
Evan Cheng
7d82d607c5
Match tblgen change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 22:12:53 +00:00
Chris Lattner
f262766619
Done
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 20:00:19 +00:00
Chris Lattner
3ab48ed72f
Enable LSR by default for SPARC: it is a clear win.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 19:59:55 +00:00
Evan Cheng
7e9b26fc73
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 07:17:49 +00:00
Chris Lattner
9413678f91
add an option to turn on LSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26080 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 05:06:36 +00:00
Chris Lattner
3029f92051
Adjust to MachineConstantPool interface change: instead of keeping a
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value/alignment pair for each constant, keep a value/offset pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26078 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 04:46:04 +00:00
Chris Lattner
fa77d43ba1
rename fields of constant pool entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26076 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 04:22:52 +00:00
Chris Lattner
5ac38d147b
Always pass in an alignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26070 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 02:19:16 +00:00
Chris Lattner
23c574a841
provide an explicit alignment for cp entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26069 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 02:15:30 +00:00
Evan Cheng
34167215a8
Change Select() from
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SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 00:37:58 +00:00
Chris Lattner
418caa1356
Darwin doesn't support #APP/#NO_APP
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26066 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08 23:42:22 +00:00
Chris Lattner
6f4a072e1f
Rename BSel -> PPCBSel for the benefit of doxygen users.
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Move the methods out of line.
Remove unused Debug.h stuff.
Teach getNumBytesForInstruction to know the size of an inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26064 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-08 19:33:26 +00:00