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2857 Commits

Author SHA1 Message Date
Jim Grosbach
37c53ff6a7 Tidy up. No need for a Twine here, as it's just constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155026 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 18:39:27 +00:00
Jim Grosbach
723fc11f91 Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155025 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 18:39:23 +00:00
Jim Grosbach
5bd9e0dd02 Tidy up. Add a '.' at the end of the sentence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155024 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 18:39:19 +00:00
Jim Grosbach
7be43977b4 Clean up warning text. Remove extraneous prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155015 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 18:09:50 +00:00
Jim Grosbach
9b29ea4eb3 TableGen use PrintWarning rather than fprintf(stderr,...) for warnings. 
That way we get source line number information from the diagnostics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155014 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 17:46:41 +00:00
Silviu Baranga
e546c4c9c3 Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor number was removed for this instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155000 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 13:02:55 +00:00
Jim Grosbach
67cd20d039 Sanity check error handling for TokenAlias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154951 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-17 21:23:52 +00:00
Jim Grosbach
65da6fc8af Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154881 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-17 00:01:04 +00:00
Craig Topper
b57b170317 Fix target specific intrinsic handling to adjust intrinsic number before doing attribute table lookup. Also fix attribute table lookup to handle 'invalid' intrinsic correctly. Fixes PR12542 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154658 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-13 06:14:57 +00:00
Jim Grosbach
2ce182c90c Remove incorrect comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154533 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 21:09:54 +00:00
Jim Grosbach
11fc6467e6 Tidy up. Remove hard tab characters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154532 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 21:02:33 +00:00
Jim Grosbach
bf1aab1507 Tidy up. Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154531 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 21:02:30 +00:00
Andrew Trick
ec14cd7ddc TableGen's regpressure: emit per-registerclass weight limits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154518 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 18:16:28 +00:00
Andrew Trick
5c1761d486 TableGen'd regpressure: register unit set pruning. 
The pruning is more complete if it is not done incrementally. The code
is also a tad less convluted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154510 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 17:35:26 +00:00
Andrew Trick
680363b5fd Tablegen'd regpressure: emit the weighted pressure limit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154477 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 04:31:33 +00:00
Andrew Trick
aa744e2c44 Table-generated register pressure fixes. 
Handle mixing allocatable and unallocatable register gracefully.
Simplify the pruning of register unit sets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154474 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 03:19:15 +00:00
Andrew Trick
4b745588c9 TableGen/reginfo potential bug: typo from previous checkin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154452 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 23:53:32 +00:00
Andrew Trick
0fb0678106 Fix for register pressure tables. 
Recent refactoring introduced a bug. Fix: added buildRegUnitSets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154382 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 03:36:49 +00:00
Andrew Trick
c72e08b4a9 Use std::includes instead of my own implementation. 
Jakob's review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154377 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 03:12:29 +00:00
Andrew Trick
176194d4ee Added register unit sets to the target description. 
This is a new algorithm that finds sets of register units that can be
used to model registers pressure. This handles arbitrary, overlapping
register classes. Each register class is associated with a (small)
list of pressure sets. These are the dimensions of pressure affected
by the register class's liveness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154374 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 02:25:24 +00:00
Andrew Trick
d35ac3c8bc Added register unit weights to the target description. 
This is a new algorithm that associates registers with weighted
register units to accuretely model their effect on register
pressure. This handles registers with multiple overlapping
subregisters. It is possible, but almost inconceivable that the
algorithm fails to find an exact solution for a target description. If
an exact solution cannot be found, an inexact, but reasonable solution
will be chosen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154373 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 02:25:21 +00:00
Andrew Trick
aec111a06b Fix header comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154372 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 02:25:18 +00:00
Craig Topper
58609b7413 Convert assert(false) followed by a return to llvm_unreachable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153997 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-04 04:55:46 +00:00
Craig Topper
9b1b25f063 Tidy up spacing in some tablegen outputs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153937 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 06:52:47 +00:00
Craig Topper
769bbfd951 Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153935 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 05:20:24 +00:00
Andrew Trick
5aeda3f076 Cleanup set_union usage. The same thing but a bit cleaner now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153922 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 01:35:52 +00:00
Andrew Trick
f1275959b2 Use std::set_union instead of nasty custom code. 
I just noticed Jakob's examples of the proper application of
std::set... routines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153918 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 00:47:23 +00:00
Silviu Baranga
545b962f15 Second part for the 153874 one 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153875 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-02 15:46:46 +00:00
Benjamin Kramer
94338594ef Emit the asm writer's mnemonic table with SequenceToOffsetTable. 
This way we can get AVX v-prefixed instructions tail merged with the normal insns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153869 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-02 09:13:46 +00:00
Craig Topper
fab3f7ee6f Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153865 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-02 07:48:39 +00:00
Craig Topper
7c0b3c1fb6 Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153863 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-02 07:01:04 +00:00
Craig Topper
a4bd58b0f0 Use SequenceToOffsetTable to generate instruction name table for AsmWriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153857 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-02 00:47:39 +00:00
Craig Topper
413b2e7539 Use SequenceToOffsetTable to create instruction name table. Saves space particularly on X86 where AVX instructions just add a 'v' to the front of other instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153841 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-01 18:14:14 +00:00
Benjamin Kramer
243018ffcf Emit the LLVM<->DWARF register mapping as a sorted table and use binary search to do the lookup. 
This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts
with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated
by recent inliner changes but the methods were already enormous with the old inline cost computation.

The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table.
I didn't implement that optimization yet to avoid potentially changing functionality.

There is still some duplication both in tablegen and the generated code that should be cleaned up eventually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153837 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-01 14:23:58 +00:00
Andrew Trick
9f2a9d741f comment typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153796 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-31 02:39:17 +00:00
Andrew Trick
dd9a50196c Introduce Register Units: Give each leaf register a number. 
First small step toward modeling multi-register multi-pressure. In the
future, register units can also be used to model liveness and
aliasing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153794 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-31 01:35:59 +00:00
Benjamin Kramer
cef670a3a3 Rip out emission of the regIsInRegClass function for the asm printer. 
It's slow, bloated and completely redundant with MCRegisterClass::contains.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153782 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 23:13:40 +00:00
Jakob Stoklund Olesen
c19f72bd83 Use SequenceToOffsetTable in emitRegisterNameString. 
This allows suffix sharing in register names. (AX is a suffix of EAX).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153777 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 21:12:52 +00:00
Jakob Stoklund Olesen
0d4e2ea00e Reapply 153764 and 153761 with a fix. 
Use an explicit comparator instead of the default.

The sets are sorted, but not using the default comparator. Hopefully,
this will unbreak the Linux builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153772 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 20:24:14 +00:00
Rafael Espindola
77ff8bbc2a Revert 153764 and 153761. They broke a --enable-optimized --enable-assertions 
--enable-expensive-checks build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153771 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 20:09:06 +00:00
Jakob Stoklund Olesen
ecf2d9fc0d Compress SimpleValueType lists by sharing. 
Many register classes have the same value types. Share the table space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153764 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 17:42:04 +00:00
Jakob Stoklund Olesen
8f36b0b139 Compress register lists by sharing suffixes. 
TableGen emits lists of sub-registers, super-registers, and overlaps. Put
them all in a single table and use a SequenceToOffsetTable to share
suffixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153761 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 17:25:43 +00:00
Jakob Stoklund Olesen
184440e808 Add a SequenceToOffsetTable to TableGen. 
This is similar to the StringToOffsetTable we use to produce string
tables, but it can be used for other sequences than strings, and it
eliminates entries for suffixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153760 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-30 17:25:40 +00:00
Jakob Stoklund Olesen
c6a96ff6ae Add more constness to CodeGenRegisters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153667 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-29 18:03:59 +00:00
Jakob Stoklund Olesen
5b2f913664 Spill DPair registers, not just QPR. 
The arm_neon intrinsics can create virtual registers from the DPair
register class which allows both even-odd and odd-even D-register pairs.

This fixes PR12389.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153603 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-28 21:20:32 +00:00
Chris Lattner
ef18cd381c fix a failure path to print the right thing, part of PR12357 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153457 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-26 19:11:51 +00:00
Benjamin Kramer
72e84f51a6 TableGen: Don't emit the llvm intrinsic -> gcc builtin table, its only user was the c backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153432 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-26 11:08:03 +00:00
Benjamin Kramer
901b85888c Include cstdio in a few place that depended on getting it transitively through StringExtras.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153328 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-23 11:35:30 +00:00
Evan Cheng
aa7b3df178 Reserve number of MI operands to accom,odate complex patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153125 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-20 21:07:51 +00:00
Craig Topper
5a4c790c06 More const-correcting of FixedLenDecoderEmitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152906 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-16 06:52:56 +00:00