Commit Graph

12 Commits

Author SHA1 Message Date
Akira Hatanaka
434c0bd2a5 [mips] Implement MipsTargetMachine::getInstrItineraryData().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 23:33:22 +00:00
Akira Hatanaka
1ae08e0077 [mips] Print move instructions.
"move $4, $5" is printed instead of "or $4, $5, $zero".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04 22:25:01 +00:00
Akira Hatanaka
a88322c283 [mips] Implement MipsRegisterInfo::getRegPressureLimit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173197 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22 21:34:25 +00:00
Akira Hatanaka
68fe665b9a [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
physical register $r1 to $r0.

GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.

Original patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 04:06:06 +00:00
Akira Hatanaka
de4a127470 Eliminate the stack slot used to save the global base register.
The long branch pass (fixed in r160601) no longer uses the global base register
to compute addresses of branch destinations, so it is not necessary to reserve
a slot on the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160703 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-25 03:16:47 +00:00
Akira Hatanaka
163d706c46 Fix test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:21:00 +00:00
Dan Gohman
8c2d270ae8 Change the default scheduler from Latency to ILP, since Latency
is going away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 17:45:02 +00:00
Akira Hatanaka
33ff5aeaa8 Fix test cases.
Generate code for Mips32r1 unless a Mips32r2 feature is tested.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 23:14:58 +00:00
Akira Hatanaka
25eba399cb Change the chain input of nodes that load the address of a function. This change
enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a
pre-existing node instead of redundantly create a new node every time it is
called.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 19:01:25 +00:00
Akira Hatanaka
17a1e87751 Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
saving and restoring them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:39:33 +00:00
Akira Hatanaka
cd0f90f831 Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 02:30:51 +00:00
Akira Hatanaka
a1a7ba8382 Align i64 arguments to 64 bit boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:29:48 +00:00