Commit Graph

24391 Commits

Author SHA1 Message Date
Reid Kleckner
7c898facbc Revert "Update LLVM bindings after r239940. ..."
Revert the changes to the C API LLVMBuildLandingPad that were part of
the personality function move. We now set the personality on the parent
function when the C API attempts to construct a landingpad with a
personality.

This reverts commit r240010.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242372 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-16 01:16:39 +00:00
Alex Lorenz
81bef8c7a7 MIR Serialization: Serialize the jump table info.
The jump table info is serialized using a YAML mapping that contains its kind
and a YAML sequence of jump table entries. A jump table entry is a YAML mapping
that has an ID and an inline YAML sequence of machine basic block references.

The testcase 'CodeGen/MIR/X86/jump-table-info.mir' doesn't have any instructions
because one of them contains a jump table index operand. The jump table index
operands will be serialized in a follow up patch, and the appropriate
instructions will be added to this testcase.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 23:31:07 +00:00
Cong Hou
102d0382d4 Remove a private member of BranchProbabilityInfo which is not used at all.
The member to be removed is LoopInfo *LI.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 23:20:34 +00:00
Cong Hou
8770f7af5f Create a wrapper pass for BranchProbabilityInfo.
This new wrapper pass is useful when we want to do branch probability analysis conditionally (e.g. only in PGO mode) but don't want to add one more pass dependence.

http://reviews.llvm.org/D11241



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242349 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 22:48:29 +00:00
Rafael Espindola
ba7661d294 For new archive member we only need to store the full path.
We were storing both the path and the file name, which was redundant
and easy to get confused up with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242347 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 22:46:53 +00:00
Matthias Braun
2aa5727755 TargetRegisterInfo: Provide a way to check assigned registers in getRegAllocationHints()
Pass a const reference to LiveRegMatrix to getRegAllocationHints()
because some targets can prodive better hints if they can test whether a
physreg has been used for register allocation yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 22:16:00 +00:00
Alex Lorenz
71da3635d9 MIR Serialization: Serialize references from the stack objects to named allocas.
This commit serializes the references to the named LLVM alloca instructions from
the stack objects in the machine frame info. This commit adds a field 'Name' to
the struct 'yaml::MachineStackObject'. This new field is used to store the name
of the alloca instruction when the alloca is present and when it has a name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242339 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 22:14:49 +00:00
Rafael Espindola
8d1daf644b Handle the error of trying to convert a regular archive to a thin one.
While at it, test that we can add to a thin archive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242330 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 20:45:56 +00:00
Cong Hou
2fa118d257 Rename doFunction() in BFI to calculate() and change its parameters from pointers to references.
http://reviews.llvm.org/D11196



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 19:58:26 +00:00
Bruno Cardoso Lopes
ae1ebf6cf7 Revert "Look through PHIs to find additional register sources"
Likely broke compilation on ARM:

http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/13054

This reverts commit 131ce4a838c081516cbfed039fc986b33e3979d6.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242310 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 18:10:35 +00:00
Rafael Espindola
b7faac8a2e Delete declared but not implemented functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 17:19:39 +00:00
Adrian Prantl
bd584159e1 Debug Info: Add basic support for external types references.
This is a necessary prerequisite for bootstrapping the emission
of debug info inside modules.

- Adds a FlagExternalTypeRef to DICompositeType.
  External types must have a unique identifier.
- External type references are emitted using a forward declaration
  with a DW_AT_signature([DW_FORM_ref_sig8]) based on the UID.

http://reviews.llvm.org/D9612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 17:01:41 +00:00
Bruno Cardoso Lopes
b11d8102cf Look through PHIs to find additional register sources
- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197

rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 15:35:23 +00:00
Alexandros Lamprineas
4aa2f4514c -Added API for retrieving the default FPU of a CPU from TargetParser.
-Implemented as a table lookup.

Change-Id: Iaad0eaf4b29b06827e6700269496dc1ba20e9018
Phabricator: http://reviews.llvm.org/D11100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242284 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 10:46:21 +00:00
Hal Finkel
b2a353c753 [MachineCombiner] Work with itineraries
MachineCombiner predicated its use of scheduling-based metrics on
hasInstrSchedModel(), but useful conclusions can be drawn from pipeline
itineraries as well. Almost all of the logic (except for resource tracking in
preservesResourceLen) can be used if we have an itinerary, so enable it in that
case as well.

This will be used by the PowerPC backend in an upcoming commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242277 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 08:22:23 +00:00
Petr Pavlu
d2e1e42c1a [TableGen] Improve decoding options for non-orthogonal instructions
When FixedLenDecoder matches an input bitpattern of form [01]+ with an
instruction bitpattern of form [01?]+ (where 0/1 are static bits and ? are
mixed/variable bits) it passes the input bitpattern to a specific instruction
decoder method which then makes a final decision whether the bitpattern is a
valid instruction or not. This means the decoder must handle all possible
values of the variable bits which sometimes leads to opcode rewrites in the
decoder method when the instructions are not fully orthogonal.

The patch provides a way for the decoder method to say that when it returns
Fail it does not necessarily mean the bitpattern is invalid, but rather that
the bitpattern is definitely not an instruction that is recognized by the
decoder method. The decoder can then try to match the input bitpattern with
other possible instruction bitpatterns.

For example, this allows to solve a situation on AArch64 where the `MSR
(immediate)` instruction has form:
1101 0101 0000 0??? 0100 ???? ???1 1111
but not all values of the ? bits are allowed. The rejected values should be
handled by the `extended MSR (register)` instruction:
1101 0101 000? ???? ???? ???? ???? ????

The decoder will first try to decode an input bitpattern that matches both
bitpatterns as `MSR (immediate)` but currently this puts the decoder method of
`MSR (immediate)` into a situation when it must be able to decode all possible
values of the ? bits, i.e. it would need to rewrite the instruction to `MSR
(register)` when it is not `MSR (immediate)`.

The patch allows to specify that the decoder method cannot determine if the
instruction is valid for all variable values. The decoder method can simply
return Fail when it knows it is definitely not `MSR (immediate)`. The decoder
will then backtrack the decoding and find that it can match the input
bitpattern with the more generic `MSR (register)` bitpattern too.

Differential Revision: http://reviews.llvm.org/D7174


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242274 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 08:04:27 +00:00
Rafael Espindola
4c9cd28947 Initial support for writing thin archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242269 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-15 05:47:46 +00:00
Wei Mi
d5892380e1 Create a wrapper pass for BlockFrequencyInfo.
This is useful when we want to do block frequency analysis
conditionally (e.g. only in PGO mode) but don't want to add
one more pass dependence.

Patch by congh.
Approved by dexonsmith.
Differential Revision: http://reviews.llvm.org/D11196


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242248 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 23:40:50 +00:00
JF Bastien
5d382c45da WebAssembly: fix build breakage.
Summary:
processFunctionBeforeCalleeSavedScan was renamed to determineCalleeSaves and now takes a BitVector parameter as of rL242165, reviewed in http://reviews.llvm.org/D10909

WebAssembly is still marked as experimental and therefore doesn't build by default. It does, however, grep by default! I notice that processFunctionBeforeCalleeSavedScan is still mentioned in a few comments and error messages, which I also fixed.

Reviewers: qcolombet, sunfish

Subscribers: jfb, dsanders, hfinkel, MatzeB, llvm-commits

Differential Revision: http://reviews.llvm.org/D11199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 23:06:07 +00:00
Adam Nemet
c2944f6690 [LAA] Turn RuntimePointerChecking into a class, start hiding things, NFC
The goal is to start hiding internal APIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242220 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 22:32:52 +00:00
Adam Nemet
00b675df73 [LAA] Introduce RuntimePointerChecking::PointerInfo, NFC
Turn this structure-of-arrays (i.e. the various pointer attributes) into
array-of-structures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242219 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 22:32:50 +00:00
Adam Nemet
944e082905 [LAA] Lift RuntimePointerCheck out of LoopAccessInfo, NFC
I am planning to add more nested classes inside RuntimePointerCheck so
all these triple-nesting would be hard to follow.

Also rename it to RuntimePointerChecking (i.e. append 'ing').

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242218 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 22:32:44 +00:00
Rafael Espindola
7a6e3434ba Add support for reading members out of thin archives.
For now the Archive owns the buffers of the thin archive members.
This makes for a simple API, but all the buffers are destructed
only when the archive is destructed. This should be fine since we
close the files after mmap so we should not hit an open file
limit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242215 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 22:18:43 +00:00
Lang Hames
d0838f887a [ExecutionEngine] Re-apply r241962 with fixes for ARM.
Patch by Pierre-Andre Saulais. Thanks Pierre-Andre!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242213 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 22:11:10 +00:00
Pete Cooper
ba77f37392 Add allnodes() iterator range to SelectionDAG. NFC.
SelectionDAG already had begin/end methods for iterating over all
the nodes, but didn't define an iterator_range for us in foreach
loops.

This adds such a method and uses it in some of the eligible places
throughout the backends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242212 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 22:10:54 +00:00
Pete Cooper
4362ca6c77 Move SDNode::IROrder in to padding to save space. NFC.
There was a 32-bit padding gap between 'unsigned short NumOperands, NumValues;' and 'DebugLoc debugLoc.  Move 'unsigned IROrder' in to that gap.

This trims the size of SDNode's from 76 bytes (really 80 due to alignment) to 72 bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242211 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 21:54:55 +00:00
Pete Cooper
f1c70f9279 Constify parameters in SelectionDAG methods. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242210 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 21:54:52 +00:00
Alex Lorenz
6e50c921d0 MIR Serialization: Serialize the machine basic block live in registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242204 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 21:24:41 +00:00
Keno Fischer
890c16626f [CodeGen] Force emission of personality directive if explicitly specified
Summary:
Before this change, personality directives were not emitted
if there was no invoke left in the function (of course until
recently this also meant that we couldn't know what
the personality actually was). This patch forces personality directives
to still be emitted, unless it is known to be a noop in the absence of
invokes, or the user explicitly specified `nounwind` (and not
`uwtable`) on the function.

Reviewers: majnemer, rnk

Subscribers: rnk, llvm-commits

Differential Revision: http://reviews.llvm.org/D10884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 19:22:51 +00:00
Richard Smith
77906b9964 Add support for on-disk hash table lookup with a known hash, for situations where the same key will be looked up in multiple tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 18:40:59 +00:00
Matthias Braun
2addf067a2 MachineRegisterInfo: Remove UsedPhysReg infrastructure
We have a detailed def/use lists for every physical register in
MachineRegisterInfo anyway, so there is little use in maintaining an
additional bitset of which ones are used.

Removing it frees us from extra book keeping. This simplifies
VirtRegMap.

Differential Revision: http://reviews.llvm.org/D10911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:52:07 +00:00
David Blaikie
230c4739b3 Avoid MSVC-incompatible use of init list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242170 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:40:53 +00:00
Matthias Braun
65a4053af8 RAGreedy: Keep track of allocated PhysRegs internally
Do not use MachineRegisterInfo::setPhysRegUsed()/isPhysRegUsed()
anymore. This bitset changes function-global state and is set by the
VirtRegRewriter anyway.
Simply use a bitvector private to RAGreedy.

Differential Revision: http://reviews.llvm.org/D10910

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:38:17 +00:00
Nemanja Ivanovic
582194d3b8 Add missing builtins to the PPC back end for ABI compliance (vol. 4)
This patch corresponds to review:
http://reviews.llvm.org/D11183

Back end portion of the fourth round of additions to altivec.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:25:20 +00:00
Matthias Braun
a36268215f PrologEpilogInserter: Rewrite API to determine callee save regsiters.
This changes TargetFrameLowering::processFunctionBeforeCalleeSavedScan():

- Rename the function to determineCalleeSaves()
- Pass a bitset of callee saved registers by reference, thus avoiding
  the function-global PhysRegUsed bitset in MachineRegisterInfo.
- Without PhysRegUsed the implementation is fine tuned to not save
  physcial registers which are only read but never modified.

Related to rdar://21539507

Differential Revision: http://reviews.llvm.org/D10909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:17:13 +00:00
Rafael Espindola
6e9f427cb2 llvm-ar: Don't try to extract from thin archives.
This matches the gnu ar behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242162 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 16:55:13 +00:00
David Blaikie
0ea5f00226 Add default value for Args parameter of IRBuilder::CreateCall
Convenient for calls to zero-argument functions.

Patch by servuswiegehtz at yahoo.de

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 16:38:30 +00:00
Hans Wennborg
a69b1311b2 Allocate the IntervalMap in ELF.h on the heap to work around MSVC alignment bug (PR24113)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 16:27:16 +00:00
Alexandros Lamprineas
b83440104d Caused regressions: compile Release+Asserts failed on clang-native-arm-cortex-a9
Revert "-Added API for retrieving the default FPU of a CPU from TargetParser."

This reverts commit 01199ab0c6.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242147 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 14:34:06 +00:00
Alexandros Lamprineas
01199ab0c6 -Added API for retrieving the default FPU of a CPU from TargetParser.
-Implemented as a table lookup.

Change-Id: Ibf7217f6bd2769e9c06835a5aede3d072dee6757
Phabricator: http://reviews.llvm.org/D11100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242141 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 13:20:48 +00:00
Andrew Wilkins
7c492a1752 Add capability to get and set the personalitty function from the C API
Summary:
The capability was lost with D10429 where the personality function was set at function level rather than landing pad level. Now there is no way to get/set the personality function from the C API. That is a problem.

Note that the whole thing could be avoided by improving the C API testing, as started by D10725

Reviewers: chandlerc, bogner, majnemer, andrew.w.kaylor, rafael, rnk, axw

Subscribers: rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D10946

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242104 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 01:23:06 +00:00
Rafael Espindola
ec6cc055ce Add a herper function. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242100 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 01:06:16 +00:00
Alex Lorenz
dee03ee0f9 MIR Serialization: Serialize the variable sized stack objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242095 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 00:26:26 +00:00
Nico Weber
b32a9f5c0f Reduce memory usage of ComputeEditDistance() by (almost) 50%
ComputeEditDistance() currently keeps two rows of the edit distance matrix in
memory.  That's unnecessary, one row plus one additional element are sufficient.
With this change, strings up to 64 chars can be processed without going to the
heap, compared to 32 chars previously.  (But the main motivation is that the
code gets a bit simpler.)

No intended behavior change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242069 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 21:33:21 +00:00
Rafael Espindola
168b1bebf0 Add support deterministic output in llvm-ar and make it the default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242061 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 20:38:09 +00:00
Alex Lorenz
ad7556d177 MIR Serialization: Serialize the fixed stack objects.
This commit serializes the fixed stack objects, including fixed spill slots.
The fixed stack objects are serialized using a YAML sequence of YAML inline
mappings. Each mapping has the object's ID, type, size, offset, and alignment.
The objects that aren't spill slots also serialize the isImmutable and isAliased
flags.

The fixed stack objects are a part of the machine function's YAML mapping.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 18:07:26 +00:00
Benjamin Kramer
0ed5091742 Remove macro guards for extern template instantiations.
This is a C++11 feature that both GCC and MSVC have supported as ane extension
long before C++11 was approved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 17:21:31 +00:00
Rafael Espindola
94162a044b Don't change the visibility when converting a definition to a declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 14:18:22 +00:00
Elena Demikhovsky
a0a51734cd AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types.
In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.

Differential Revision: http://reviews.llvm.org/D11134



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 13:26:20 +00:00
Jingyue Wu
8e7e3650af [LSR] don't attempt to promote ephemeral values to indvars
Summary:
This at least saves compile time. I also encountered a case where
ephemeral values affect whether other variables are promoted, causing
performance issues. It may be a bug in LSR, but I didn't manage to
reduce it yet. Anyhow, I believe it's in general not worth considering
ephemeral values in LSR.

Reviewers: atrick, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11115

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242011 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 03:28:53 +00:00