Commit Graph

80850 Commits

Author SHA1 Message Date
Hao Liu
41b3fe53ba [InterleavedAccess] Add a pass InterleavedAccess to identify interleaved memory accesses and transform into target specific intrinsics.
E.g. An interleaved load (Factor = 2):
        %wide.vec = load <8 x i32>, <8 x i32>* %ptr
        %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6>
        %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7>
It can be transformed into a ld2 intrinsic in AArch64 backend or a vld2 intrinsic in ARM backend.

E.g. An interleaved store (Factor = 3):
        %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
        store <12 x i32> %i.vec, <12 x i32>* %ptr
It can be transformed into a st3 intrinsic in AArch64 backend or a vst3 intrinsic in ARM backend.

Differential Revision: http://reviews.llvm.org/D10533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 02:10:27 +00:00
Matthias Braun
48362d63cf Revert "X86: Reject register operands with obvious type mismatches."
Revert until http://llvm.org/PR23955 is investigated.

This reverts commit r239309.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:26:49 +00:00
Alexey Samsonov
863c0d000e [ASan] Use llvm::getDISubprogram() to get function entry debug location.
It can be more robust than copying debug info from first non-alloca
instruction in the entry basic block. We use the same strategy in
coverage instrumentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240738 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:00:47 +00:00
Duncan P. N. Exon Smith
2da1484e97 AsmPrinter: Use an intrusively linked list for DIE::Children
Replace the `std::vector<>` for `DIE::Children` with an intrusively
linked list.  This is a strict memory improvement: it requires no
auxiliary storage, and reduces `sizeof(DIE)` by one pointer.  It also
factors out the DIE-related malloc traffic.

This drops llc memory usage from 735 MB down to 718 MB, or ~2.3%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:52:10 +00:00
Duncan P. N. Exon Smith
73e3fb6ba8 AsmPrinter: Convert DIE::Values to a linked list
Change `DIE::Values` to a singly linked list, where each node is
allocated on a `BumpPtrAllocator`.  In order to support `push_back()`,
the list is circular, and points at the tail element instead of the
head.  I abstracted the core list logic out to `IntrusiveBackList` so
that it can be reused for `DIE::Children`, which also cares about
`push_back()`.

This drops llc memory usage from 799 MB down to 735 MB, about 8%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:46:41 +00:00
NAKAMURA Takumi
1688551243 PPCISelLowering.cpp: Appease PR23956. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240727 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:38:44 +00:00
Anna Zaks
ead297bb04 [asan] Do not instrument special purpose LLVM sections.
Do not instrument globals that are placed in sections containing "__llvm"
in their name.

This fixes a bug in ASan / PGO interoperability. ASan interferes with LLVM's
PGO, which places its globals into a special section, which is memcpy-ed by
the linker as a whole. When those goals are instrumented, ASan's memcpy wrapper
reports an issue.

http://reviews.llvm.org/D10541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:35:48 +00:00
Anna Zaks
f291e057a4 [asan] Don't run stack malloc on functions containing inline assembly.
It makes LLVM run out of registers even on 64-bit platforms. For example, the
following test case fails on darwin.

clang -cc1 -O0 -triple x86_64-apple-macosx10.10.0 -emit-obj -fsanitize=address -mstackrealign -o ~/tmp/ex.o -x c ex.c
error: inline assembly requires more registers than available

void TestInlineAssembly(const unsigned char *S, unsigned int pS, unsigned char *D, unsigned int pD, unsigned int h) {

unsigned int sr = 4, pDiffD = pD - 5;
unsigned int pDiffS = (pS << 1) - 5;
char flagSA = ((pS & 15) == 0),
flagDA = ((pD & 15) == 0);
asm volatile (
  "mov %0,  %%"PTR_REG("si")"\n"
  "mov %2,  %%"PTR_REG("cx")"\n"
  "mov %1,  %%"PTR_REG("di")"\n"
  "mov %8,  %%"PTR_REG("ax")"\n"
  :
  : "m" (S), "m" (D), "m" (pS), "m" (pDiffS), "m" (pDiffD), "m" (sr), "m" (flagSA), "m" (flagDA), "m" (h)
  : "%"PTR_REG("si"), "%"PTR_REG("di"), "%"PTR_REG("ax"), "%"PTR_REG("cx"), "%"PTR_REG("dx"), "memory"
);
}

http://reviews.llvm.org/D10719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240722 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:35:45 +00:00
Matt Arsenault
5bf34efcce DAGCombiner: Use pop_back_val()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 22:15:05 +00:00
Rafael Espindola
b24bbb73a7 Add an ELFSymbolRef type.
This allows user code to say Sym.getSize() instead of having to manually fetch
the object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 22:10:04 +00:00
Frederic Riss
d26d587fbe IAS: Use the root macro instanciation for location
r224810 fixed the handling of macro debug locations in AsmParser. This patch
fixes the logic to actually do what was intended: it uses the first macro of
the macro stack instead of the last one. The updated testcase shows that the
current scheme doesn't work when macro instanciations are nested and multiple
files are used.

Reviewers: compnerd

Differential Revision: http://reviews.llvm.org/D10463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240705 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:57:33 +00:00
Sanjay Patel
7db079305c fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:11:08 +00:00
Pete Cooper
5c09803aee Use foreach loop over constant operands. NFC.
A number of places had explicit loops over Constant::operands().
Just use foreach loops where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:51:38 +00:00
Jingyue Wu
529f49db93 [InstCombine] call SimplifyICmpInst with correct context
Summary:
Fixes PR23809. Without passing the context to SimplifyICmpInst, we would
use the assume to prove that the condition feeding the assume is
trivially true (see isValidAssumeForContext in ValueTracking.cpp),
causing the removal of the assume which may be useful for later
optimizations.

Test Plan: pr23800.ll

Reviewers: hfinkel, majnemer

Reviewed By: hfinkel

Subscribers: henryhu, llvm-commits, wengxt, broune, meheff, eliben

Differential Revision: http://reviews.llvm.org/D10695

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240683 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:14:47 +00:00
Rafael Espindola
1de6f369b3 Diagnose undefined temporary symbols.
We already disallowed

.global .Lfoo

so this is reasonable.

This is a small cherry pick from r240130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:10:45 +00:00
Yaron Keren
9d1dc09759 Rangify for loop in Inliner.cpp. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240678 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 19:28:24 +00:00
Matt Arsenault
a59b0561c8 DAGCombiner: Remove redundant check
MemIntrinsicSDNode is already a subclass of MemSDNode,
so the MemSDNode check is sufficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240672 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 18:47:02 +00:00
Peter Collingbourne
8d5e4e48bc GVN: If a branch has two identical successors, we cannot declare either dead.
This previously caused miscompilations as a result of phi nodes receiving
undef incoming values from blocks dominated by such successors.

Differential Revision: http://reviews.llvm.org/D10726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 18:32:02 +00:00
Kit Barton
1ebbc68719 [PPC] Implement vmrgew and vmrgow instructions
This patch adds support for the vector merge even word and vector merge odd word
instructions introduced in POWER8.

Phabricator review: http://reviews.llvm.org/D10704


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240650 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 15:17:40 +00:00
Bruno Cardoso Lopes
39b2e22f00 [AsmPrinter] Fix crash in handleIndirectSymViaGOTPCRel
Check for symbols in MCValue before using them. Bail out early in case
they are null. This fixes PR23779.

Differential Revision: http://reviews.llvm.org/D10712

rdar://problem/21532830

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240649 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 15:17:23 +00:00
Rafael Espindola
8bf1076cf9 Use computeSymbolSizes in llvm-symbolize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240646 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 15:06:38 +00:00
Benjamin Kramer
6f5a75de5e [PPC] Replace debug value skipping with getLastNonDebugInstr.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240641 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 13:39:03 +00:00
Benjamin Kramer
2f6d58ae0d Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240639 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 13:28:24 +00:00
Toma Tabacu
3b503894c2 [mips] [IAS] Refactor the emitDirectiveModuleFP() functions. NFC.
Summary:
Simplify emitDirectiveModuleFP() by having it just print the current information
from MipsABIFlagsSection and doing an updateABIInfo() before such calls.

This prevents us from forgetting to update the STI.FeatureBits,
because updateABIInfo() uses those to update the MipsABIFlagsSection object,
and also makes sure we use the update mechanism from MipsABIFlagsSection.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, mpf

Differential Revision: http://reviews.llvm.org/D10642

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240637 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 12:44:38 +00:00
Artur Pilipenko
f2e7bb5d2f Take alignment into account in isSafeToLoadUnconditionally
Reviewed By: hfinkel

Differential Revision: http://reviews.llvm.org/D10475


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240636 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 12:18:43 +00:00
Ulrich Weigand
01381b0e95 [SystemZ] Only attempt RxSBG optimization for integer types
As pointed out by Justin Bogner (see r240520), SystemZDAGToDAGISel::Select
currently attempts to convert boolean operations into RxSBG even on some
non-integer types (in particular, vector types).  This would not work in
any case, and it happened to trigger undefined behaviour in allOnes.

This patch verifies that we have a (<= 64-bit) integer type before
attempting to perform this optimization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 11:52:36 +00:00
Toma Tabacu
f03400827b [mips] [IAS] Refactor the emitDirectiveModuleOddSPReg() functions. NFC.
Summary:
We can simplify emitDirectiveModuleOddSPReg() by having it print the current OddSPReg information
from MipsABIFlagsSection and doing an updateABIInfo() before such calls.

This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object,
and also makes sure we use the update mechanism from MipsABIFlagsSection.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, mpf

Differential Revision: http://reviews.llvm.org/D10641

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240630 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 10:56:57 +00:00
Jay Foad
0ee17729e5 Teach LLVM about the PPC64 memory sanitizer implementation.
Summary:
This is the LLVM part of the PPC memory sanitizer implementation in
D10648.

Reviewers: kcc, samsonov, willschm, wschmidt, eugenis

Reviewed By: eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 10:34:29 +00:00
Toma Tabacu
e39f000353 [mips] [IAS] Fix parsing of memory offset expressions with parenthesis depth >1.
Summary:
In an expression such as "(((a+b)+c)+d)", parseParenExpression() would only parse the "a+b)+c", which would result in an error later on in the parser.
This means that we can only parse one level of inner parentheses.

In order to fix this, I added a new function called parseParenExprOfDepth(), which parses a specified number of trailing parenthesis expressions
(except for the outermost parenthesis), and changed MipsAsmParser to use it in parseMemOffset instead of parseParenExpression().

Reviewers: dsanders, rafael

Reviewed By: dsanders, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240625 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 09:52:02 +00:00
Ahmed Bougacha
eb78c2fbdf [X86] Accept hasAVX512() as well as hasFMA() when generating FMA.
We don't always have FMA, for example when using 'clang -mavx512f'
without an explicit CPU.

Also check for an explicit +avx512f instead of CPUs in a couple
related tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240616 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 00:44:46 +00:00
Swaroop Sridhar
983b80cf02 Enable StackMap Serialization for COFF
Summary

This change turns on the emission of 
__LLVM_Stackmaps section when generating COFF binaries.

Test Plan

Added a scenario to the test case: 
test\CodeGen\X86\statepoint-stackmap-format.ll.

Code Review:

http://reviews.llvm.org/D10680



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 00:28:42 +00:00
Rui Ueyama
7d6e44bde8 libObject/COFF: Add a function to get pointers to relocation entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240610 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 00:07:39 +00:00
Duncan P. N. Exon Smith
a0b4ef1f70 Add simplify_type<const WeakVH>; simplify IndVarSimplify
r240214 fixed some UB in IndVarSimplify, and it needed a temporary
`WeakVH` to do it.  Add `simplify_type<const WeakVH>` so that this
temporary isn't necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240599 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 22:23:21 +00:00
Douglas Katzman
72260ba601 [X86] Simplify some stuff in X86DisassemblerDecoder. NFC
- Deciding that insn->sibIndex is SIB_INDEX_NONE does not require another
check beyond the fully decoded bits being equal to 0x4.
The expression insn->sibIndex == SIB_INDEX_sib could not have been true unless
index were 0x4, because SIB_INDEX_sib is merely the range base (SIB_INDEX_EAX)
plus 4. Respectively SIB_INDEX_sib64.

- Don't use a switch statement to perform left-shift.

Differential Revision: http://reviews.llvm.org/D9762

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240598 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 22:04:55 +00:00
David Majnemer
12bb40b2ab [GVN] Intersect the IR flags when CSE'ing two instructions
We performed a simple, but incomplete, intersection when it came time to
CSE instructions.  It didn't handle, for example, the 'exact' flag.

This fixes PR23922.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 21:52:25 +00:00
David Majnemer
95a741163f [Reassociate] Don't propogate flags when creating negations
Reassociate mutated existing instructions in order to form negations
which would create additional reassociate opportunities.

This fixes PR23926.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240593 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 21:27:36 +00:00
Sanjay Patel
613afa1372 fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240592 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:42:33 +00:00
Sanjay Patel
473e5d658e don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240591 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:40:57 +00:00
Akira Hatanaka
45dc32257e [If Converter] Convert recursion to iteration.
This commit makes changes to IfConverter::AnalyzeBlock to use iteration instead
of recursion. Previously, this function would get called recursively a large
number of times and eventually segfault when a function with the following CFG
was compiled:

BB0:
 if (condition0)
  goto BB1
 goto BB2
BB1:
 goto BB2
BB2:
 if (condition1)
  goto BB3
 goto BB4
BB3:
...
(repeat until BB7488)

rdar://problem/21386145

Differential Revision: http://reviews.llvm.org/D10587


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240589 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:34:35 +00:00
Pete Cooper
f79d253a3e Devirtualize Instruction::clone_impl
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240588 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:22:23 +00:00
Jingyue Wu
58f8a138a9 Add NVPTXPeephole pass to reduce unnecessary address cast
Summary:
This patch first change the register that holds local address for stack
frame to %SPL. Then the new NVPTXPeephole pass will try to scan the
following pattern

   %vreg0<def> = LEA_ADDRi64 <fi#0>, 4
   %vreg1<def> = cvta_to_local %vreg0

and transform it into

   %vreg1<def> = LEA_ADDRi64 %VRFrameLocal, 4

Patched by Xuetian Weng

Test Plan: test/CodeGen/NVPTX/local-stack-frame.ll

Reviewers: jholewinski, jingyue

Reviewed By: jingyue

Subscribers: eliben, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10549

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240587 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:20:16 +00:00
Sanjay Patel
8e5b874f17 fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240585 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:07:50 +00:00
Matthias Braun
7d46df3626 ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it
This fixes PR23912

Differential Revision: http://reviews.llvm.org/D10620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 20:03:27 +00:00
Rafael Espindola
a3af347f38 Make computeSymbolSizes never fail.
On ELF that was already the case since getting the size of a symbol
never fails.

On MachO and COFF we could fail trying to get the section of a symbol. But
we don't really need the section, just the section number to know if two
symbols are in the same section or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240580 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:57:32 +00:00
Alex Lorenz
c9a4f3d5d9 MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10618


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240579 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:56:10 +00:00
Rafael Espindola
fa21ae52f0 Use Symbol::getValue to simplify object::computeSymbolSizes. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:32:52 +00:00
Jingyue Wu
5d59315f13 [LSR] canonicalize Prod*(1<<C) to Prod<<C
Summary:
Because LSR happens at a late stage where mul of a power of 2 is
typically canonicalized to shl, this canonicalization emits code that
can be better CSE'ed.

Test Plan:
Transforms/LoopStrengthReduce/shl.ll shows how this change makes GVN more
powerful. Fixes some existing tests due to this change.

Reviewers: sanjoy, majnemer, atrick

Reviewed By: majnemer, atrick

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D10448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:28:40 +00:00
Rafael Espindola
1171dada02 Use Symbol.getValue to simplify RuntimeDyldCOFF::getSymbolOffset. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:27:53 +00:00
Rafael Espindola
9fa0ab3335 Add a SymbolRef::getValue.
This returns either the symbol offset or address. Since it is not defined which
one, it never has to lookup the section and so never fails.

I will add users in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240569 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 19:11:10 +00:00
Pete Cooper
234c5890e7 Devirtualize Constant::replaceUsesOfWithOnConstant.
This is part of the work to devirtualize Value.

The old pattern was to call replaceUsesOfWithOnConstant which was overridden by
subclasses.  Those could then call replaceUsesOfWithOnConstantImpl on Constant
to handle deleting the current value.

To be consistent with other parts of the code, this has been changed so that we
call the method on Constant, and that dispatches to an Impl on subclasses.

As part of this, it made sense to rename the methods to be more descriptive.  The
new name is Constant::handleOperandChange, and it requires that all subclasses of
Constant implement handleOperandChangeImpl, even if they just throw an error if
they shouldn't be called.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-24 18:55:24 +00:00