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7814 Commits

Author SHA1 Message Date
Anton Korobeynikov
2365f51ed0 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-14 14:06:15 +00:00
Evan Cheng
03494d7c8f Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39843 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 23:55:50 +00:00
Dale Johannesen
e7e7d0d7e3 Skeleton of post-RA scheduler; doesn't do anything yet. 
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 17:13:54 +00:00
Chris Lattner
8dc4b59b85 Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39813 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 16:24:10 +00:00
Dale Johannesen
66a2a8f878 ARM: make branch folder remove unconditional branches 
following jump tables that it earlier inserted.  This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39782 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-12 16:45:35 +00:00
Chris Lattner
ca23e17adf another missed SSE optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39772 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-12 06:31:38 +00:00
Bruno Cardoso Lopes
a4e8200366 Added support for Mips specific GAS directives 
Fixed print immediate 
Fixed Identation on MipsISelDAGToDAG.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39764 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:24:41 +00:00
Bruno Cardoso Lopes
7b155fbd60 Added support for framepointer 
Prologue/Epilogue support fp,ra save/restore and use the stack frame the right
way!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39763 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:21:31 +00:00
Bruno Cardoso Lopes
758dcca57a Now that stack is represented the right way, LOA starts at 0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39761 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:17:41 +00:00
Bruno Cardoso Lopes
2ab22d1b93 Fixed AddLiveOut issues 
FI's created the write way to represent Mips stack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39760 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 23:16:16 +00:00
Bruno Cardoso Lopes
332a3d22a2 Removed unused immediate PatLeaf, fixed lui instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39759 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 22:47:02 +00:00
Bruno Cardoso Lopes
4215a59a76 Added MipsMachineFunction class, to hold Mips dinamic stack info when inserting Prologue/Epilog 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39758 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 22:44:21 +00:00
Lauro Ramos Venancio
a126bb71d5 Handle packed structs in the CBackend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39752 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 19:56:53 +00:00
Dale Johannesen
5d9c4b6020 Fix hang compiling TimberWolf (allow for islands 
of size other than 4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39743 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 18:32:38 +00:00
Lauro Ramos Venancio
75ce010f7b Assert when TLS is not implemented. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39737 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 17:19:51 +00:00
Chris Lattner
082ced9391 Fix an oversight: for modules with no other identifying target info, 
the sparc backend should be preferred when running on sparcs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39142 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 16:32:10 +00:00
Evan Cheng
8202010364 Didn't mean the last commit. Revert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38515 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 22:00:16 +00:00
Dale Johannesen
afdc7fda65 Fix fp_constant_op failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38514 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 21:53:30 +00:00
Evan Cheng
c608ff22e7 Update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38513 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 21:49:47 +00:00
Dale Johannesen
bf6b8272b1 fix 80 columnn violations, increasing the world's 
pedantic satisfaction level.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38512 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 20:53:41 +00:00
Chris Lattner
36c5155d0f add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38507 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 20:03:50 +00:00
Evan Cheng
13ab020ea0 Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38501 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 18:08:01 +00:00
Evan Cheng
2bf821c4bf Remove clobbersPred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38500 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 18:07:08 +00:00
Dan Gohman
2038252c6a Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, 
in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38478 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 00:05:58 +00:00
Dan Gohman
532dc2e1f2 Change getCopyToParts and getCopyFromParts to always use target-endian 
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 20:59:04 +00:00
Chris Lattner
87bdba6d6a The various "getModuleMatchQuality" implementations should return 
zero if they see a target triple they don't understand.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38463 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 17:25:29 +00:00
Evan Cheng
9ad6f03166 No need for ccop anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37965 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:34:09 +00:00
Evan Cheng
4b9cb7d135 Incorrect check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:23:19 +00:00
Evan Cheng
06aae67b83 Do away with ImmutablePredicateOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37961 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:22:46 +00:00
Evan Cheng
14c4655403 isUnpredicatedTerminator should treat conditional branches as unpredicated terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37960 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:22:03 +00:00
Evan Cheng
49ce02e408 Do away with ImmutablePredicateOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37959 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:21:02 +00:00
Rafael Espindola
1aa7efbd2c Add the byval attribute 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 10:57:03 +00:00
Evan Cheng
dfb2ebac29 Print the s bit if the instruction is toggled to its CPSR setting form. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37932 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 01:01:34 +00:00
Evan Cheng
04c813d00c PredicateDefOperand -> OptionalDefOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37931 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 01:00:49 +00:00
Evan Cheng
e496d78f16 Add OptionalDefOperand to stand for optionally defined result. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37930 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 01:00:16 +00:00
Evan Cheng
148b6a419f Initial ARM JIT support by Raul Fernandes Herbster. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37926 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 21:15:40 +00:00
Anton Korobeynikov
4304bcc1ed Proper flag __alloca call 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37923 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 20:36:08 +00:00
Evan Cheng
c48072fed5 Doh 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37917 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 17:21:33 +00:00
Evan Cheng
1f6d77b54a Unbreak the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37915 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 17:13:56 +00:00
Evan Cheng
d54874a06d Unbreak the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37914 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 17:13:19 +00:00
Gabor Greif
a99be51bf5 Here is the bulk of the sanitizing. 
Almost all occurrences of "bytecode" in the sources have been eliminated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37913 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 17:07:56 +00:00
Chris Lattner
461d79c2ee the arm backend is not building, temporarily disable it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37911 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 16:11:52 +00:00
Evan Cheng
0e1d37904a Reflects the chanegs made to PredicateOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37898 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:18:20 +00:00
Evan Cheng
16b6598325 Added ARM::CPSR to represent ARM CPSR status register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37897 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:17:13 +00:00
Evan Cheng
ee568cf794 Unfortunately we now require C++ code to isel Bcc, conditional moves, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37896 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:15:27 +00:00
Evan Cheng
c85e832eb7 Each ARM use predicate operand is now made up of two components. The new component is the CPSR register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37895 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:13:32 +00:00
Evan Cheng
3b5b8368f3 Added ARM::CPSR to represent ARM CPSR status register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37894 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:11:03 +00:00
Evan Cheng
7e36966de4 PPC conditional branch predicate does not change after isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37893 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:09:50 +00:00
Evan Cheng
2aa133ef72 - Added zero_reg def to stand for register 0. 
- Added two variants of PredicateOperand: ImmutablePredicateOperand, whose predicate does not change after isel; PredicateDefOperand, which represent a predicate defintion operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37892 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:09:09 +00:00
Evan Cheng
0e4a276c72 Do not check isPredicated() on non-predicable instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37891 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:06:46 +00:00