19063 Commits

Author SHA1 Message Date
Alex Lorenz
c225eda1f1 MIR Serialization: Serialize the floating point immediate machine operands.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 20:49:21 +00:00
Duncan P. N. Exon Smith
bf2040f00c DI: Remove DW_TAG_arg_variable and DW_TAG_auto_variable
Remove the fake `DW_TAG_auto_variable` and `DW_TAG_arg_variable` tags,
using `DW_TAG_variable` in their place Stop exposing the `tag:` field at
all in the assembly format for `DILocalVariable`.

Most of the testcase updates were generated by the following sed script:

    find test/ -name "*.ll" -o -name "*.mir" |
    xargs grep -l 'DILocalVariable' |
    xargs sed -i '' \
      -e 's/tag: DW_TAG_arg_variable, //' \
      -e 's/tag: DW_TAG_auto_variable, //'

There were only a handful of tests in `test/Assembly` that I needed to
update by hand.

(Note: a follow-up could change `DILocalVariable::DILocalVariable()` to
set the tag to `DW_TAG_formal_parameter` instead of `DW_TAG_variable`
(as appropriate), instead of having that logic magically in the backend
in `DbgVariable`.  I've added a FIXME to that effect.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 18:58:39 +00:00
David Majnemer
4a45f0871a New EH representation for MSVC compatibility
This introduces new instructions neccessary to implement MSVC-compatible
exception handling support.  Most of the middle-end and none of the
back-end haven't been audited or updated to take them into account.

Differential Revision: http://reviews.llvm.org/D11097

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243766 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:58:14 +00:00
Benjamin Kramer
3973e4b71b [CodeGenPrepare] Compress a pair. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 17:00:39 +00:00
Daniel Sanders
289b5e7f39 [regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards.
Summary:
This prevents vreg260 and D7 from being merged in:
  %vreg260<def> = LDC1 ...
  JAL <ga:@sin>, <regmask ... list not containing D7 ...>
  %D7<def> = COPY %vreg260; ...
Doing so is not valid because the JAL clobbers the D7.

This fixes the almabench regression in the LLVM 3.7.0 release branch.

Reviewers: MatzeB

Subscribers: MatzeB, qcolombet, hans, llvm-commits

Differential Revision: http://reviews.llvm.org/D11649


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243745 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-31 12:58:55 +00:00
Alex Lorenz
2623dd4454 MIR Parser: Report an error when a constant pool item is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243696 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 22:00:17 +00:00
Alex Lorenz
2bc631660b MIR Parser: Report an error when a virtual register is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:54:10 +00:00
Sanjay Patel
8a6197a968 fix memcpy/memset/memmove lowering when optimizing for size
Fixing MinSize attribute handling was discussed in D11363. 
This is a prerequisite patch to doing that.

The handling of OptSize when lowering mem* functions was broken
on Darwin because it wants to ignore -Os for these cases, but the
existing logic also made it ignore -Oz (MinSize).

The Linux change demonstrates a widespread problem. The backend
doesn't usually recognize the MinSize attribute by itself; it
assumes that if the MinSize attribute exists, then the OptSize 
attribute must also exist. 

Fixing this more generally will be a follow-on patch or two.

Differential Revision: http://reviews.llvm.org/D11568



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243693 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:41:50 +00:00
Sanjay Patel
3b00227629 enable fast-math-flag propagation to DAG nodes
This uncovered latent bugs previously:
http://reviews.llvm.org/D10403

...but it's time to try again because internal tests aren't finding more.

If time passes and no other bugs are reported, we can remove this cl::opt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:06:55 +00:00
Mehdi Amini
93204d28b8 Add a TargetMachine hook that verifies DataLayout compatibility
Summary: Also provide the associated assertion when CodeGen starts.

Reviewers: echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11654

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 20:33:18 +00:00
Alex Lorenz
fbd94791e6 MIR Serialization: Serialize the machine basic block's successor weights.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 16:54:38 +00:00
Pete Cooper
639ec3da92 Reapply "Add reverse(ContainerTy) range adapter."
This reverts commit r243567, which ultimately reapplies r243563.

The fix here was to use std::enable_if for overload resolution.  Thanks to David
Blaikie for lots of help on this, and for the extra tests!

Original commit message follows:

For cases where we needed a foreach loop in reverse over a container,
we had to do something like

 for (const GlobalValue *GV : make_range(TypeInfos.rbegin(),
                                         TypeInfos.rend())) {

This provides a convenience method which shortens this to

 for (const GlobalValue *GV : reverse(TypeInfos)) {

There are 2 versions of this, with a preference to the rbegin() version.

The first uses rbegin() and rend() to construct an iterator_range.

The second constructs an iterator_range from the begin() and end() methods
wrapped in std::reverse_iterator's.

Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243581 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:19:09 +00:00
Alex Lorenz
81474d36a0 MIR Serialization: Serialize the frame info's save and restore points.
This commit serializes the save and restore machine basic block references from
the machine frame information class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 21:09:09 +00:00
Alex Lorenz
3b4ca38ce1 MIR Parser: Extract the code that parses MBB references into a new method. NFC.
This commit extracts the code that's used by the class 'MIRParserImpl' to parse
the machine basic block references into a new method named 'parseMBBReference'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:57:11 +00:00
Pete Cooper
c54abc96f8 Revert "Add reverse(ContainerTy) range adapter."
This reverts commit r243563.

The GCC buildbots were extremely unhappy about this.  Reverting while
we discuss a better way of doing overload resolution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:29:10 +00:00
Pete Cooper
a53ce4e0be Add reverse(ContainerTy) range adapter.
For cases where we needed a foreach loop in reverse over a container,
we had to do something like

  for (const GlobalValue *GV : make_range(TypeInfos.rbegin(),
                                          TypeInfos.rend())) {

This provides a convenience method which shortens this to

  for (const GlobalValue *GV : reverse(TypeInfos)) {

There are 2 versions of this, with a preference to the rbegin() version.

The first uses rbegin() and rend() to construct an iterator_range.

The second constructs an iterator_range from the begin() and end() methods
wrapped in std::reverse_iterator's.

Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243563 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:00:39 +00:00
Jingyue Wu
7e90f694b6 Roll forward r242871
r242871 missed one place that should be guarded with isPhysicalReg. This patch
fixes that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243555 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:59:09 +00:00
Alex Lorenz
dd741a8795 MIR Serialization: Serialize the '.cfi_def_cfa' CFI instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:57:23 +00:00
Alex Lorenz
0b7483edda MIR Parser: Parse multiple LHS register machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243553 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:51:21 +00:00
Sanjay Patel
7a641cc940 move DAGCombiner's allowableAlignment() helper function into the TLI
Making allowableAlignment() more accessible was suggested as a predecessor patch
for D10662, so I've pulled it into TargetLowering. This let's us remove 4 instances
of duplicate logic in LegalizeDAG.

There's a subtle functional change in the implementation: the existing 
allowableAlignment() code was using getPrefTypeAlignment() when checking 
alignment with the DataLayout and assumed that was fast. In this implementation,
we use getABITypeAlignment() and assume that is fast. See the TODO comment or the
discussion in the Phab review for future improvements in this implementation
(don't use the data layout at all).

There are no regression test changes from this difference, and I'm not sure how to
expose it via a test. I think we actually do want to provide the 'Fast' param when
checking this from DAGCombiner::MergeConsecutiveStores(). Ie, we shouldn't merge 
stores if the new stores are not going to be fast. But that change will require 
fixing allowsMisalignedMemoryAccess() overrides as noted in D10662.

Differential Revision: http://reviews.llvm.org/D10905



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243549 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:24:18 +00:00
Bruno Cardoso Lopes
4e3c7c262b Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Reported to Broke some internal tests: PR24303

This reverts commit r243486.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243540 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 17:46:47 +00:00
Aaron Ballman
a229846f3f Reverting r243386 because it has serious post-commit concerns that have not been addressed. Also reverts r243389, which relied on this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243527 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 15:57:49 +00:00
Jingyue Wu
d63325d5ad Temporarily revert r242871
PR24299


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 15:26:11 +00:00
Sanjoy Das
44d65eac43 [Statepoints] Let patchable statepoints have a symbolic call target.
Summary:
As added initially, statepoints required their call targets to be a
constant pointer null if ``numPatchBytes`` was non-zero.  This turns out
to be a problem ergonomically, since there is no way to mark patchable
statepoints as calling a (readable) symbolic value.

This change remove the restriction of requiring ``null`` call targets
for patchable statepoints, and changes PlaceSafepoints to maintain the
symbolic call target through its transformation.

Reviewers: reames, swaroop.sridhar

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11550

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 23:50:30 +00:00
Sanjay Patel
8fd3ed9e3a ignore duplicate divisor uses when transforming into reciprocal multiplies (PR24141)
PR24141: https://llvm.org/bugs/show_bug.cgi?id=24141
contains a test case where we have duplicate entries in a node's uses() list.

After r241826, we use CombineTo() to delete dead nodes when combining the uses into
reciprocal multiplies, but this fails if we encounter the just-deleted node again in
the list.

The solution in this patch is to not add duplicate entries to the list of users that
we will subsequently iterate over. For the test case, this avoids triggering the
combine divisors logic entirely because there really is only one user of the divisor.

Differential Revision: http://reviews.llvm.org/D11345



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243500 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 23:28:22 +00:00
Sanjay Patel
6ea347b66f fix TLI's combineRepeatedFPDivisors interface to return the minimum user threshold
This fix was suggested as part of D11345 and is part of fixing PR24141.

With this change, we can avoid walking the uses of a divisor node if the target
doesn't want the combineRepeatedFPDivisors transform in the first place.

There is no NFC-intended other than that.

Differential Revision: http://reviews.llvm.org/D11531



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243498 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 23:05:48 +00:00
Alex Lorenz
ba90cee0f1 MIR Serialization: Serialize the target index machine operands.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 23:02:45 +00:00
Bruno Cardoso Lopes
6969fd1c60 [PeepholeOptimizer] Look through PHIs to find additional register sources
Reapply 243271 with more fixes; although we are not handling multiple
sources with coalescable copies, we were not properly skipping this
case.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 21:45:50 +00:00
Alex Lorenz
6d0376c00c MIR Serialization: Serialize the block address machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243453 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 17:28:03 +00:00
Alex Lorenz
b82063e6e5 MIR Parser: Extract the method 'parseGlobalValue'. NFC.
This commit extracts the code that parses a global value from the method
'parseGlobalAddressOperand' into a new method 'parseGlobalValue', so that this
code can be reused by the method which will parse the block address machine
operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243450 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 17:09:52 +00:00
Alex Lorenz
e787364571 MIR Parser: Move the function 'lexName'. NFC.
This commit moves the function 'lexName' to the start of the file so it can
be reused by the function which will lex the named LLVM IR block references.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243449 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 17:03:40 +00:00
Alex Lorenz
8302e12df3 MIR Printer: Remove an outdated TODO comment and assertion. NFC.
This commit removes an outdated TODO comment and a corresponding assertion
which asserts that the mir printer can't the print machine basic blocks that
aren't sequentially numbered.

This comment and assertion were correct when I was working on the patch which
serialized the machine basic blocks, but then I decided to add an 'ID'
attribute to the machine basic block's YAML mapping based on the patch review.
This comment and assertion then became invalid as with the 'ID' attribute we
can serialize the non sequential machine basic blocks and their references
without any problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243447 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 16:56:45 +00:00
Alex Lorenz
3e85c48d36 MIR Parser: Remove redundant parameters. NFC.
This commit removes the redundant parameters from the two methods
'initializeRegisterInfo' and 'initializeFrameInfo'. The removed parameters are
redundant as we are already passing in the 'MachineFunction' to those methods,
and those parameters can be derived from the machine function parameter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243445 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 16:48:37 +00:00
Chih-Hung Hsieh
dc73dc09f1 Implement target independent TLS compatible with glibc's emutls.c.
The 'common' section TLS is not implemented.
Current C/C++ TLS variables are not placed in common section.
DWARF debug info to get the address of TLS variables is not generated yet.

clang and driver changes in http://reviews.llvm.org/D10524

  Added -femulated-tls flag to select the emulated TLS model,
  which will be used for old targets like Android that do not
  support ELF TLS models.

Added TargetLowering::LowerToTLSEmulatedModel as a target-independent
function to convert a SDNode of TLS variable address to a function call
to __emutls_get_address.

Added into lib/Target/*/*ISelLowering.cpp to call LowerToTLSEmulatedModel
for TLSModel::Emulated. Although all targets supporting ELF TLS models are
enhanced, emulated TLS model has been tested only for Android ELF targets.
Modified AsmPrinter.cpp to print the emutls_v.* and emutls_t.* variables for
emulated TLS variables.
Modified DwarfCompileUnit.cpp to skip some DIE for emulated TLS variabls.

TODO: Add proper DIE for emulated TLS variables.
      Added new unit tests with emulated TLS.

Differential Revision: http://reviews.llvm.org/D10522


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243438 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 16:24:05 +00:00
Puyan Lotfi
fbb4b5254d Changes for MachineBasicBlock to use SortedVector for LiveIns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243389 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:38:41 +00:00
Mehdi Amini
3942a2979d Move the Target way of overriding DAG Scheduler to a target hook
Summary:
The previous way of overriding it was relying on calling "setDefault"
on the global registry, which implies global mutable state.

Reviewers: echristo, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11538

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243388 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-28 06:18:04 +00:00
Alex Lorenz
01b5d5b27f MIR Serialization: Serialize the unnamed basic block references.
This commit serializes the references from the machine basic blocks to the
unnamed basic blocks.

This commit adds a new attribute to the machine basic block's YAML mapping
called 'ir-block'. This attribute contains the actual reference to the
basic block.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 22:42:41 +00:00
Alex Lorenz
1c1ccc2527 MIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243322 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:39:03 +00:00
Alex Lorenz
342851440d MIR Parser: Rename the standalone parsing methods. NFC.
This commit renames the methods 'parseMBB' and 'parseNamedRegister' to
'parseStandaloneMBB' and 'parseStandaloneNamedRegister' in order for their
names to be consistent with the method 'parseStandaloneVirtualRegister'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243319 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:29:27 +00:00
Bruno Cardoso Lopes
272154cc86 Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources"
Still breaks some ARM buildbots. This reverts r243271.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 20:26:04 +00:00
Sanjay Patel
5834764c65 move combineRepeatedFPDivisors logic into a helper function; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:58:49 +00:00
Alex Lorenz
6c304ebd8a Reset the virtual registers in liveins when clearing the virtual registers.
This commit zeroes out the virtual register references in the machine
function's liveins in the class 'MachineRegisterInfo' when the virtual
register definitions are cleared.

Reviewers: Matthias Braun


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243290 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:51:59 +00:00
Alex Lorenz
a5da4f1f8d MIR Serialization: Serialize the machine function's liveins.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243288 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:42:45 +00:00
Bruno Cardoso Lopes
4abd22ba6b [PeepholeOptimizer] Look through PHIs to find additional register sources
Reapply r242295 with fixes in the implementation.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243271 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 14:39:46 +00:00
Alex Lorenz
3a8b87d9ce MIR Serialization: Serialize MachineFrameInfo's callee saved information.
This commit serializes the callee saved information from the class
'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and
the ordinary stack objects and adds an optional 'callee-saved-register'
attribute. This attribute is used to serialize the callee save information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 22:22:50 +00:00
Pete Cooper
9f2f1650c4 Use make_range(rbegin(), rend()) to allow foreach loops. NFC.
Instead of the pattern

for (auto I = x.rbegin(), E = x.end(); I != E; ++I)

we can use make_range to construct the reverse range and iterate using
that instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243163 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 21:13:43 +00:00
Duncan P. N. Exon Smith
88c307a010 AsmPrinter: Use DICompositeType in updateAcceleratorTables(), NFC
`DISubroutineType` is impossible at this `dyn_cast` site, since we're
only dealing with named types and `DISubroutineType` cannot be named.
Strengthen the `dyn_cast` to `DICompositeType`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:45:26 +00:00
Alex Lorenz
dfe0e536ee MIR Serialization: Serialize the simple virtual register allocation hints.
This commit serializes the virtual register allocations hints of type 0.
These hints specify the preferred physical registers for allocations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:35:40 +00:00
Duncan P. N. Exon Smith
18673740dc DI: Clarify isUnsignedDIType(), NFC
Refactor `isUnsignedDIType()` to deal with `DICompositeType` explicitly.
Since `DW_TAG_subroutine_type` isn't handled here (the assertions about
tags rule it out), this allows strengthening the `dyn_cast` to
`DIDerivedType`.

Besides making the code clearer, this it removes a use of
`DIDerivedTypeBase`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243148 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 19:42:12 +00:00
Duncan P. N. Exon Smith
e4a9f1b6e7 DI: Strengthen block-byref cast to DIDerivedType, NFC
This code is visiting the members of a block-byref, and we know those
are all `DIDerivedType`.  Strengthen the cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243138 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 18:58:32 +00:00