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Author SHA1 Message Date
Evan Cheng
44be1a8d66 Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 22:52:00 +00:00
Dan Gohman
e3c65d1ede Relax this check to silently swallow FE_INEXACT, following directions 
from rdar://8452472. This unbreaks gcc.dg/builtins-17.c.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114368 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 22:32:25 +00:00
Owen Anderson
765fd9c62d CombinerAA is now reordering these stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 20:56:29 +00:00
Owen Anderson
4a9f150926 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 20:39:59 +00:00
Jim Grosbach
1dc335a79f Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:32:20 +00:00
Rafael Espindola
43779dcfef Produce a R_X86_64_32 when the value is >=0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:20:47 +00:00
Evan Cheng
7af6dc47a5 Avoid splitting critical edge twice for a set of PHI uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114338 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:12:55 +00:00
Francois Pichet
345adbe572 Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 04:03:07 +00:00
Chris Lattner
209b257c68 fix a bug I introduced back in the hayday of version #2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114319 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 03:58:32 +00:00
NAKAMURA Takumi
e6af80d11d test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen. 
r114297 raises 3 failures. They might fail also on mingw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114317 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 21:58:55 +00:00
Owen Anderson
0dcc814276 Revert r114312 while I sort out some issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 21:01:26 +00:00
Owen Anderson
d910fb2f12 Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know, 
r114268 fixed the last of the blockers to enabling it.  I will be monitoring
for failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 19:51:55 +00:00
Jakob Stoklund Olesen
71c6095814 Add one more Core i7 model number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 17:54:28 +00:00
Misha Brukman
7e28460ee9 Using regexp-opt for keyword regex declarations makes the word lists more 
readable and easier to edit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 03:44:22 +00:00
Chris Lattner
313a94c3d0 idiom recognition should catch this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 00:37:34 +00:00
Chris Lattner
702917d4e8 add a readme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114303 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 00:34:58 +00:00
Chris Lattner
222920d667 add corei7, the laptop version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114302 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 00:31:58 +00:00
NAKAMURA Takumi
cd458be047 X86Subtarget.h: Fix Cygwin's TD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114297 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 19:50:42 +00:00
Eric Christopher
50880d08ec Add the exit instruction to the PTX target. 
Patch by Che-Liang Chiou <clchiou@gmail.com>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 18:52:28 +00:00
Eric Christopher
168705049c Handle the odd case where we only have one instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114293 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 18:50:27 +00:00
Michael J. Spencer
895dda6fb5 Fix build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114292 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 17:54:37 +00:00
Rafael Espindola
ad49cf5866 Make sure the STT_FILE symbol is the first one in the symbol table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114285 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 15:03:21 +00:00
Benjamin Kramer
9e8d1f97e9 Unbreak msvc build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114284 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 14:41:26 +00:00
Gabor Greif
3fde69c0f1 restrict dyn_cast_or_null to pointer types, just like cast_or_null; re-commit of r114279, backed out in r114280 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114282 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 13:03:32 +00:00
Gabor Greif
d299ab1669 back out r114279 as some darwin buildbots get errors compiling clang: 
svn merge -c -114279 llvm/include/llvm/Support/Casting.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114280 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 12:56:47 +00:00
Gabor Greif
ce31f40295 restrict dyn_cast_or_null to pointer types, just like cast_or_null 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114279 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 12:30:15 +00:00
Gabor Greif
f097b59e0e do not rely on the implicit-dereference semantics of dyn_cast_or_null 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114278 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 11:55:34 +00:00
Gabor Greif
ea4894a7fc do not rely on the implicit-dereference semantics of dyn_cast_or_null 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 11:53:39 +00:00
Gabor Greif
89730dca5a remove CallSite::get; it is still present (as protected) in the baseclass, use one of the constructors intead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114275 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 11:48:36 +00:00
Lang Hames
481630dee5 Fixed non-const iterator error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114273 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 09:49:08 +00:00
Lang Hames
eb6c8f53b4 Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints. 
For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming 
no issues with the builder system come up.

To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 09:07:10 +00:00
Michael J. Spencer
af3874d661 docs: Tweak wording. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114271 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 08:32:32 +00:00
Evan Cheng
2399786b27 Fix code that break critical edges for PHI uses. Watch out for multiple PHIs in different blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114270 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 06:42:17 +00:00
Owen Anderson
14ac1dd2be Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is 
NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 04:45:14 +00:00
Eric Christopher
c109556a0a Thumb opcodes for thumb calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114263 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 02:32:38 +00:00
Daniel Dunbar
3f42dba88f lit: Bump version to 0.2.0dev, for no apparent reason. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114262 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 02:28:15 +00:00
Daniel Dunbar
bd26ba0b53 lit: Tweak setup.py. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114261 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 02:28:12 +00:00
Daniel Dunbar
3f32b444ed lit: These TODOs are done(ish). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114260 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 02:28:09 +00:00
Eric Christopher
6dab137b88 Add addrmode5 fp load support. Swap float/thumb operand adding to handle 
thumb with floating point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114256 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 01:59:37 +00:00
Eric Christopher
b74558ad3e Floating point stores have a 3rd addressing mode type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114254 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 01:23:38 +00:00
Rafael Espindola
d3dce16ffe Add test that was missing in my previous commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114248 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 00:37:27 +00:00
Jim Grosbach
988ce097b7 factor out a simple helper function to create a label for PC-relative 
instructions (PICADD, PICLDR, et.al.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114243 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 00:05:05 +00:00
Jim Grosbach
d30cfde935 PC-relative pseudo instructions are lowered and printed directly. Any encounter 
with one in the generic printing code is an error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114242 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 00:04:53 +00:00
Dan Gohman
23110b3c16 Attempt to XFAIL this test on arm-linux, which is inexplicably failing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 00:04:37 +00:00
Benjamin Kramer
92aa1f7123 Fix vmov.f64 disassembly on targets where sizeof(long) != 8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 23:48:07 +00:00
Jim Grosbach
fbd1873041 Add MC-inst handling for tPICADD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114237 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 23:41:53 +00:00
Bob Wilson
75f0288b7d Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64 
value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert.  Radar 8407927.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:59:05 +00:00
Jim Grosbach
e6be85e9ff Teach the (non-MC) instruction printer to use the cannonical names for push/pop, 
and shift instructions on ARM. Update the tests to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114230 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:36:38 +00:00
Rafael Espindola
0007489312 Avoid relocations in a common case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:34:41 +00:00
Evan Cheng
6edb0eac87 Teach machine sink to 
1) Do forward copy propagation. This makes it easier to estimate the cost of the
   instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
   PHI nodes.
Critical edge splitting is not yet enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:28:18 +00:00