Commit Graph

741 Commits

Author SHA1 Message Date
Dan Gohman
707e018423 Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 04:36:06 +00:00
Dan Gohman
6f836adafe Fix a bug that prevented x86-64 from using rep.movsq for
8-byte-aligned data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 02:35:39 +00:00
Chris Lattner
db66750753 Fix the x86-64 side of PR2108 by adding a v2f64 version of
MOVZQI2PQIrr.  This would be better handled as a dag combine 
(with the goal of eliminating the bitconvert) but I don't know
how to do that safely.  Thoughts welcome.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49463 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-10 05:13:43 +00:00
Evan Cheng
80b09fe8bc Teach branch folding pass about implicit_def instructions. Unfortunately we can't just eliminate them since register scavenger expects every register use to be defined. However, we can delete them when there are no intra-block uses. Carefully removing some implicit def's which enable more blocks to be optimized away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-10 02:32:10 +00:00
Evan Cheng
7e073baedb - More aggressively coalescing away copies whose source is defined by an implicit_def.
- Added insert_subreg coalescing support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49448 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-09 20:57:25 +00:00
Evan Cheng
f20d943bc6 Missed a hasInterval check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-09 01:30:15 +00:00
Dale Johannesen
c8abfdec84 Rename -disable-required-unwind-tables to -unwind-tables-optional.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49391 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-08 18:10:08 +00:00
Dale Johannesen
235f7fb474 Add -disable-required-unwind-tables to tests
that need it (usually, grepping for some string
found in unwind info)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-08 00:14:17 +00:00
Evan Cheng
565ada0b35 Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49343 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-07 17:02:18 +00:00
Chris Lattner
eeb939accb fix this testcase to pass and remove a duplicate instance of itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-06 21:39:17 +00:00
Torok Edwin
4fea2e982d Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49280 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-06 21:23:02 +00:00
Evan Cheng
0c0f83ff5d Favors pshufd over shufps when shuffling elements from one vector. pshufd is faster than shufps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-05 00:30:36 +00:00
Evan Cheng
b589d9f42d New test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49190 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03 21:25:03 +00:00
Dale Johannesen
4672d5d4db Testcase for EH with functions whose names are stripped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49111 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-02 20:16:41 +00:00
Dan Gohman
68d599df37 Speculatively micro-optimize memory-zeroing calls on Darwin 10.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49048 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 20:38:36 +00:00
Dale Johannesen
1d3863fdbc Mark functions in some tests as 'nounwind'. Generating
EH info for these functions causes the tests to fail for
random reasons (e.g. looking for 'or' or counting lines
with asm-printer; labels count as lines.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49003 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 23:20:09 +00:00
Evan Cheng
427f4c106a It's not safe to fold a load from GV stub or constantpool into a two-address use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49002 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 23:19:51 +00:00
Dan Gohman
b061c4bc44 Fix a DAGCombiner optimization to respect volatile qualification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 20:32:52 +00:00
Dan Gohman
d4a2ad35e3 Fix a tokenfactor node to use the load chain rather than the
load value. This fixes PR2177.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48932 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-28 23:45:16 +00:00
Evan Cheng
7a963fa8ee Fix a memory bug: increment an iterator of a deleted machine instr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48853 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27 01:27:25 +00:00
Evan Cheng
ed70cbb3f3 Avoid commuting a def MI in order to coalesce a copy instruction away if any use of the same val# is a copy instruction that has already been coalesced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48833 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26 19:03:01 +00:00
Dale Johannesen
27c31054ec Use ## for comment delimiter on darwin x86-32, so
llvm's output .s files will go through gcc -std=c99
without triggering preprocesser errors.  Approach
suggested by Daveed Vandevoorde.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 23:29:30 +00:00
Evan Cheng
26471c48b3 Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 20:08:07 +00:00
Dan Gohman
27845362d9 Add CMP32mr and friends to the load-unfolding table. Among
other things, this allows the scheduler to unfold a load operand
in the 2008-01-08-SchedulerCrash.ll testcase, so it now successfully
clones the comparison to avoid a pushf+popf.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48777 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 16:53:19 +00:00
Tanya Lattner
6f729d601c Byebye llvm-upgrade!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48762 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 04:26:08 +00:00
Evan Cheng
62a3f1538c - SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 21:52:23 +00:00
Dan Gohman
4c931fc6e2 APIntify SelectionDAG's EXTRACT_ELEMENT code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48726 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 16:38:05 +00:00
Evan Cheng
08b1173971 Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22 01:55:50 +00:00
Dan Gohman
f1d3d666c1 Handle getresult instructions in different basic blocks
from their aggregate operands by moving the getresult
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 21:01:32 +00:00
Chris Lattner
24e0a546b4 Add support for calls that return two FP values in
ST(0)/ST(1).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48634 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 06:38:26 +00:00
Chris Lattner
ae60ddc22a disable a bogus assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48633 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 06:01:05 +00:00
Chris Lattner
0353526ed1 Enable support for returning two long-double values in ST(0)/ST(1).
This allows us to compile fp-stack-2results.ll into:

_test:
	fldz
	fld1
	ret

which returns 1 in ST(0) and 0 in ST(1).  This is needed for x86-64
_Complex long double.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 05:57:20 +00:00
Evan Cheng
fa5a91a71e Undo 48570. Correctly match mmx shift instructions with an immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48627 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 00:40:09 +00:00
Evan Cheng
260e07ec8c Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 02:18:41 +00:00
Evan Cheng
dff1dcac6c Add intrinsics to match mmx shift builtin's with immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 23:38:52 +00:00
Christopher Lamb
15cbde3cf6 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 08:30:06 +00:00
Evan Cheng
82a6d23700 Fixed a coalescer bug caused by a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 02:26:36 +00:00
Evan Cheng
94202018c5 Fix live variables issues:
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
   = EAX, AX<imp-use,kill>
...
AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 00:52:20 +00:00
Evan Cheng
586ccac4ec Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48515 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 23:36:35 +00:00
Bill Wendling
dbfd894561 It might be nice to have this run as x86 on non-x86 platforms...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 22:38:22 +00:00
Bill Wendling
2974e49019 Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 22:29:51 +00:00
Christopher Lamb
981576c818 Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 16:46:39 +00:00
Chris Lattner
9493268124 ensure we continue matching x86-64 rotates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48437 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-17 01:35:03 +00:00
Evan Cheng
c17ba8a28d Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 20:44:01 +00:00
Evan Cheng
a56516ee08 New test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 08:05:02 +00:00
Evan Cheng
d99464d647 A test case I forgot to check in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48335 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 06:42:46 +00:00
Evan Cheng
875357d213 TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48333 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 06:37:55 +00:00
Evan Cheng
9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
Dan Gohman
89964b4ca1 Fix this test on hosts that don't have sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:40:51 +00:00
Dan Gohman
38459f01c0 Make this test x86-specific for now; targets that don't use
the automated CallingConv code to handle return values typically
don't support multiple return values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48265 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 00:25:14 +00:00