Commit Graph

4680 Commits

Author SHA1 Message Date
Bob Wilson
46455096be Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:03:02 +00:00
Evan Cheng
089751535d Avoiding overly aggressive latency scheduling. If the two nodes share an
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.

BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB

=>

BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB

This fixed the recent 256.bzip2 regression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:09:28 +00:00
John Thompson
44ab89eb37 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:29:13 +00:00
Bob Wilson
0f1db1a6c6 Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
Also do some minor refactoring to reduce indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 17:06:14 +00:00
Evan Cheng
7e2fe9150f Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:47:08 +00:00
Evan Cheng
9e08ee5d16 Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 02:00:25 +00:00
Evan Cheng
7c88cdcc3b Fix a major bug in operand latency computation. The use index must be adjusted
by the number of defs first for it to match the instruction itinerary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117518 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:46:29 +00:00
Dale Johannesen
1de4aa904e Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:11:10 +00:00
Devang Patel
7e13efad38 Assign source ordering to nodes created for StoreInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:14:52 +00:00
Nick Lewycky
a568d66512 For statistics that are only used in functions declared in !NDEBUG, wrap the
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:51:57 +00:00
Devang Patel
df8370bd70 Simplify.
Do not count use of sdisel for single call instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:31:46 +00:00
Devang Patel
948f7d0216 Add counters to count basic blocks and machine basic blocks with out of order line number info.
Add counters to count how many basic blocks are entirely selected by fastisel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:55:43 +00:00
Chandler Carruth
19e57025d4 Move the remaining attribute macros to systematic names based on the attribute
name and prefixed with 'LLVM_'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:40:19 +00:00
Michael J. Spencer
391b43bf33 X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:23 +00:00
Michael J. Spencer
dd0a00a6e3 CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:08:21 +00:00
Dale Johannesen
e93d99cf07 Remove Synthesizable from the Type system; as MMX vector
types are no longer Legal on X86, we don't need it.
No functional change.  8499854.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 21:32:10 +00:00
Dan Gohman
f96e4bd2a3 Make CodeGen TBAA-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 00:31:05 +00:00
Jim Grosbach
e4ad387a5a Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 23:27:08 +00:00
Owen Anderson
081c34b725 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:21:58 +00:00
Michael J. Spencer
84ac4d5a2a X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:41 +00:00
Michael J. Spencer
e70c526d59 Whitespace!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:21 +00:00
Chris Lattner
07e3a38c78 fix the default va_arg expansion (in the realignment case) to not implicitly
truncate the stack pointer to 32-bits on a 64-bit machine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 18:36:26 +00:00
Dan Gohman
0dadb15927 ComputeLinearIndex doesn't need its TLI argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 16:18:29 +00:00
Evan Cheng
a0792de66c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 06:27:31 +00:00
Owen Anderson
3a9e7690ba Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float).  This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 17:24:05 +00:00
Evan Cheng
2a135ae530 This DAG combine BRCOND transformation can look pass truncate of the operand:
//   %a = ...                                                                                                                                                                                  
    //   %b = and i32 %a, 2                                                                                                                                                                        
    //   %c = srl i32 %b, 1                                                                                                                                                                        
    //   brcond i32 %c ...                                                                                                                                                                         
    //                                                                                                                                                                                             
    // into                                                                                                                                                                                        
    //                                                                                                                                                                                             
    //   %a = ...                                                                                                                                                                                  
    //   %b = and i32 %a, 2                                                                                                                                                                        
    //   %c = setcc eq %b, 0                                                                                                                                                                       
    //   brcond %c ...

Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.

This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-04 22:41:01 +00:00
Devang Patel
27f46cd639 Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 19:00:44 +00:00
Gabor Greif
fb4032f422 typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 10:32:19 +00:00
Chris Lattner
6bf263b4a2 fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 06:54:02 +00:00
Chris Lattner
2831a19495 fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 05:36:09 +00:00
Dale Johannesen
0488fb649a Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
Jakob Stoklund Olesen
2622f4622c When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.

If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.

This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.

The fix is to uipdate stale MBB pointers whenever a block is split during
emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 19:44:31 +00:00
Evan Cheng
3881cb7a5d Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
pipeline forwarding path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29 22:42:35 +00:00
Oscar Fuentes
3609eb0de2 Removed a bunch of unnecessary target_link_libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 22:39:14 +00:00
Dale Johannesen
61b20efd9a Don't try to make a vector of x86mmx; this won't work,
and asserts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27 17:29:14 +00:00
John Thompson
54584743f3 Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24 22:24:05 +00:00
Michael J. Spencer
1f40960543 Get rid of pop_macro warnings on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24 19:48:47 +00:00
Evan Cheng
8c1f4329e2 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 18:32:19 +00:00
Oscar Fuentes
df30bdb3a7 Fix VS 2010 build.
Patch by Nathan Jeffords!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 16:59:36 +00:00
Evan Cheng
b8db1981b8 Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 07:18:35 +00:00
Evan Cheng
266a99d161 SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.

This is one of the patches leading up to disabling codegen prepare critical edge
splitting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 06:51:55 +00:00
Owen Anderson
ed1088afb5 A select between a constant and zero, when fed by a bit test, can be efficiently
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:58:22 +00:00
John Thompson
67aff164c0 Fixed pr20314-2.c failure, added E, F, p constraint letters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 22:04:54 +00:00
Chris Lattner
d847bc20b8 Rework passing parent pointers into complexpatterns, I forgot
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 22:00:25 +00:00
Devang Patel
44cfe14445 If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
Testcase is in r114476.
This fixes radar 8412415.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:56:33 +00:00
Chris Lattner
77bd88cda5 correct this logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:46:40 +00:00
Owen Anderson
bc146b0a4d Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:42:50 +00:00
Chris Lattner
78d3af47f5 just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:37:12 +00:00
Chris Lattner
84bd98ac7b finish pushing MachinePointerInfo through selectiondags. At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:58:22 +00:00
Chris Lattner
6229d0acb8 update a bunch of code to use the MachinePointerInfo version of getStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:41:36 +00:00