Commit Graph

14261 Commits

Author SHA1 Message Date
Tobias Grosser
e3f5ae7b9e Remove IntegerType constness from TargetData
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-12 11:36:58 +00:00
Chris Lattner
a17ce80a1e make the IRBuilder type methods return non-const types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-12 04:14:22 +00:00
Bill Wendling
2280ebd614 Revert r134893 and r134888 (and related patches in other trees). It was causing
an assert on Darwin llvm-gcc builds.

Assertion failed: (castIsValid(op, S, Ty) && "Invalid cast!"), function Create, file /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.llvm-gcc-i386-darwin9-RA/llvm.src/lib/VMCore/Instructions.cpp, li\
ne 2067.
etc.

http://smooshlab.apple.com:8013/builders/llvm-gcc-i386-darwin9-RA/builds/2354

--- Reverse-merging r134893 into '.':
U    include/llvm/Target/TargetData.h
U    include/llvm/DerivedTypes.h
U    tools/bugpoint/ExtractFunction.cpp
U    unittests/Support/TypeBuilderTest.cpp
U    lib/Target/ARM/ARMGlobalMerge.cpp
U    lib/Target/TargetData.cpp
U    lib/VMCore/Constants.cpp
U    lib/VMCore/Type.cpp
U    lib/VMCore/Core.cpp
U    lib/Transforms/Utils/CodeExtractor.cpp
U    lib/Transforms/Instrumentation/ProfilingUtils.cpp
U    lib/Transforms/IPO/DeadArgumentElimination.cpp
U    lib/CodeGen/SjLjEHPrepare.cpp
--- Reverse-merging r134888 into '.':
G    include/llvm/DerivedTypes.h
U    include/llvm/Support/TypeBuilder.h
U    include/llvm/Intrinsics.h
U    unittests/Analysis/ScalarEvolutionTest.cpp
U    unittests/ExecutionEngine/JIT/JITTest.cpp
U    unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp
U    unittests/VMCore/PassManagerTest.cpp
G    unittests/Support/TypeBuilderTest.cpp
U    lib/Target/MBlaze/MBlazeIntrinsicInfo.cpp
U    lib/Target/Blackfin/BlackfinIntrinsicInfo.cpp
U    lib/VMCore/IRBuilder.cpp
G    lib/VMCore/Type.cpp
U    lib/VMCore/Function.cpp
G    lib/VMCore/Core.cpp
U    lib/VMCore/Module.cpp
U    lib/AsmParser/LLParser.cpp
U    lib/Transforms/Utils/CloneFunction.cpp
G    lib/Transforms/Utils/CodeExtractor.cpp
U    lib/Transforms/Utils/InlineFunction.cpp
U    lib/Transforms/Instrumentation/GCOVProfiling.cpp
U    lib/Transforms/Scalar/ObjCARC.cpp
U    lib/Transforms/Scalar/SimplifyLibCalls.cpp
U    lib/Transforms/Scalar/MemCpyOptimizer.cpp
G    lib/Transforms/IPO/DeadArgumentElimination.cpp
U    lib/Transforms/IPO/ArgumentPromotion.cpp
U    lib/Transforms/InstCombine/InstCombineCompares.cpp
U    lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
U    lib/Transforms/InstCombine/InstCombineCalls.cpp
U    lib/CodeGen/DwarfEHPrepare.cpp
U    lib/CodeGen/IntrinsicLowering.cpp
U    lib/Bitcode/Reader/BitcodeReader.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-12 01:15:52 +00:00
Jay Foad
eeb64ae6e5 De-constify Types in StructType::get() and TargetData::getIntPtrType().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 09:56:20 +00:00
Jay Foad
f362affa3a De-constify Types in FunctionType::get().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 07:56:41 +00:00
Evan Cheng
59ee62d241 - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 03:57:24 +00:00
Chandler Carruth
ac7d295542 Make the destructor virtual to silence GCC's -Wnon-virtual-dtor. Let me
know if there is some problem with this destructor being virtual...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-10 08:38:12 +00:00
Jakub Staszak
f81b7f6069 Use BranchProbability instead of floating points in IfConverter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-10 02:58:07 +00:00
Jakub Staszak
687dc24e1d - Make BranchProbability constructor public.
- Add getCompl() method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-10 02:12:39 +00:00
Chris Lattner
c0ca67fbd3 finish a thought.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-10 00:29:18 +00:00
Chris Lattner
eaf79809e8 the various ConstantExpr::get*Ty methods existed to work with issues around
type refinement.  Zap them now that type refinement is toast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 18:23:52 +00:00
Chris Lattner
145ab10711 Eliminate the WriteTypeSymbolic function. Now that types know
their names, we don't need a module around to print them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134835 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 18:03:13 +00:00
Chris Lattner
aca50a94b8 remove the DerivedType which isn't adding value anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 17:59:15 +00:00
Chris Lattner
1afcace3a3 Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM.  One way to look at it
is through diffstat:
 109 files changed, 3005 insertions(+), 5906 deletions(-)

Removing almost 3K lines of code is a good thing.  Other advantages
include:

1. Value::getType() is a simple load that can be CSE'd, not a mutating
   union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
   uniques them.  This means that the compiler doesn't merge them structurally
   which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
   struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
   in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead 
   "const Type *" everywhere.

Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.  
"LLVM 3.0" is the right time to do this.

There are still some cleanups pending after this, this patch is large enough
as-is.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134829 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 17:41:24 +00:00
Chris Lattner
c36ed70ec5 add a #include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134822 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 17:00:38 +00:00
Chris Lattner
a668c9ee49 fix a really bad bug that would cause nested cursors to break,
used by the new bitcode reader.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 17:00:12 +00:00
Evan Cheng
ffc0e73046 Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 05:47:46 +00:00
Cameron Zwarich
97cd3cf9b0 Add an fma TableGen node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134762 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 22:49:34 +00:00
Cameron Zwarich
33390848a7 Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 21:39:21 +00:00
Jakob Stoklund Olesen
51458ed09e Be more aggressive about following hints.
RAGreedy::tryAssign will now evict interference from the preferred
register even when another register is free.

To support this, add the EvictionCost struct that counts how many hints
are broken by an eviction. We don't want to break one hint just to
satisfy another.

Rename canEvict to shouldEvict, and add the first bit of eviction policy
that doesn't depend on spill weights: Always make room in the preferred
register as long as the evictees can be split and aren't already
assigned to their preferred register.

Also make the CSR avoidance more accurate. When looking for a cheaper
register it is OK to use a new volatile register. Only CSR aliases that
have never been used before should be avoided.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 20:46:18 +00:00
Evan Cheng
480cee5d43 TargetAsmParser doesn't need reference to Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 19:33:14 +00:00
Jim Grosbach
86f9adb8be TableGen'erated MC lowering for simple pseudo-instructions.
This allows the (many) pseudo-instructions we have that map onto a single
real instruction to have their expansion during MC lowering handled
automatically instead of the current cumbersome manual expansion required.
These sorts of pseudos are common when an instruction is used in situations
that require different MachineInstr flags (isTerminator, isBranch, et. al.)
than the generic instruction description has. For example, using a move
to the PC to implement a branch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 17:36:35 +00:00
Benjamin Kramer
9c64030445 Emit a more efficient magic number multiplication for exact sdivs.
We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building.

  struct foo { char x[24]; };
  long bar(struct foo *a, struct foo *b) { return a-b; }
is now compiled into
  movl	4(%esp), %eax
  subl	8(%esp), %eax
  sarl	$3, %eax
  imull	$-1431655765, %eax, %eax
instead of
  movl	4(%esp), %eax
  subl	8(%esp), %eax
  movl	$715827883, %ecx
  imull	%ecx
  movl	%edx, %eax
  shrl	$31, %eax
  sarl	$2, %edx
  addl	%eax, %edx
  movl	%edx, %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 10:31:30 +00:00
Evan Cheng
ebdeeab812 Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 01:53:10 +00:00
Bill Wendling
4ae970b393 Move a function out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 21:05:13 +00:00
Akira Hatanaka
3014b2f322 This patch adds a flag in MCAsmInfo that indicates whether dwarf register
numbers should be printed instead of symbolic register names in
MCAsmStreamer::EmitRegisterName. This is necessary because some versions of
GNU assembler won't accept code in which symbolic register names are used in
cfi directives. There is no change in behavior unless the flag is explicitly
set to true by a backend.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 20:30:33 +00:00
Evan Cheng
347c50a293 Feature bits are 64-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 07:45:49 +00:00
Evan Cheng
0ddff1b535 Compute feature bits at time of MCSubtargetInfo initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 07:07:08 +00:00
Bill Wendling
b99e412650 Use ArrayRef instead of a std::vector&.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134595 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 04:42:01 +00:00
Lang Hames
944520f38c Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. The
hasPredecessorHelper function allows predecessors to be cached to speed up
repeated invocations. This fixes PR10186.

X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X)

Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with
empty Visited and Worklist sets (i.e. no caching over invocations).

Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited
and Worklist to speed up repeated calls. The Visited set is searched for X
before going to the worklist to further search the DAG if necessary.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 04:31:51 +00:00
Bill Wendling
6a6b8c3e96 Add a target hook to encode the compact unwind information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 00:54:13 +00:00
Owen Anderson
9cbd7afb76 Fix a subtle issue in SmallVector. The following code did not work as expected:
vec.insert(vec.begin(), vec[3]);
The issue was that vec[3] returns a reference into the vector, which is invalidated when insert() memmove's the elements down to make space.  The method needs to specifically detect and handle this case to correctly match std::vector's semantics.

Thanks to Howard Hinnant for clarifying the correct behavior, and explaining how std::vector solves this problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134554 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 22:36:59 +00:00
Nick Lewycky
298bc9a1a5 Add ImmutableList::contains(). Patch by Rui Paulo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:59:48 +00:00
Jim Grosbach
806fcc040e Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:33:38 +00:00
Devang Patel
231a5ab746 Simplify. Consolidate dbg.declare handling in AllocaPromoter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:09:55 +00:00
Bill Wendling
486dd90696 Constify getCompactUnwindRegNum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 20:33:48 +00:00
Evan Cheng
b262799d49 createMCInstPrinter doesn't need TargetMachine anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 19:45:42 +00:00
Jakub Staszak
9da9934e27 Introduce "expect" intrinsic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 18:22:43 +00:00
Dan Gohman
9c04b5bd28 Remove the ObjC ARC passes from the default optimization list, and add
extension points to be used by clang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 22:01:44 +00:00
Devang Patel
c5e9138797 Speculatively revert r134431.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 21:16:28 +00:00
Devang Patel
15cf76ca75 Clear debug loc while updating insert point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 18:58:22 +00:00
Michael J. Spencer
dedd6ee135 Fix 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 14:49:08 +00:00
Tobias Grosser
598179ee2f SuccIterator on bbs without terminator insts
Remove the assert that triggers if SuccIterator is constructed for a basic block
without a terminator instruction. Instead of triggering an assert a succ_end()
iterator is returned. This models a basic block with zero successors and allows
us to use F->viewCFG() on incompletely constructed functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04 23:09:02 +00:00
Jakob Stoklund Olesen
d519de0827 Include a source location when complaining about bad inline assembly.
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 03:53:34 +00:00
Evan Cheng
2416b89621 Add getFeatureBits to extract feature bits for a given CPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:43:44 +00:00
Eric Christopher
4d59ff95d8 Remove the confusing getDarwinNumber() api and friends.
Part of rdar://9714064


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:19:55 +00:00
Douglas Gregor
6ced1d12dd Add initial *-*-rtems* target, from Joel Sherrill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:41:06 +00:00
Evan Cheng
ce795dc92f Add MCSubtargetInfo target registry stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134279 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:25:04 +00:00
Evan Cheng
5b1b4489cf Rename TargetSubtarget to TargetSubtargetInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 21:01:15 +00:00
Evan Cheng
94214703d9 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 20:45:01 +00:00
Evan Cheng
4db3cffe94 Hide the call to InitMCInstrInfo into tblgen generated ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 17:57:27 +00:00
Rafael Espindola
3f9b9eb57d Fix use after free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 04:40:50 +00:00
Evan Cheng
e1bff38386 Switch SubtargetFeatures from std::string to StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134219 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:23:10 +00:00
Bill Wendling
5cd2791513 Add target a target hook to get the register number used by the compact unwind
encoding for the registers it knows about. Return -1 if it can't handle that
register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 23:20:32 +00:00
Rafael Espindola
cfe5254cd3 Create a isFullCopy predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 21:15:52 +00:00
Rafael Espindola
77a2c372fa Add r134057 back, but splice the predecessor after the successors phi
nodes.

Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 20:14:24 +00:00
Evan Cheng
276365dd4b Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:53:36 +00:00
Eric Christopher
5244c4cc2f Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:20:03 +00:00
Devang Patel
272511f518 Revert r133953 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:50:13 +00:00
Andrew Trick
3290239daf Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point
that dominates the given Use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:01:52 +00:00
Andrew Trick
45f454d569 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 22:52:51 +00:00
Evan Cheng
33b259f46c Indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 21:58:37 +00:00
Chad Rosier
ce77aa3edc Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and
lifetime intrinsics" due to buildbot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 16:22:11 +00:00
Rafael Espindola
0fb7dcd48f Let simplify cfg simplify bb with only debug and lifetime intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 05:25:47 +00:00
Evan Cheng
ab8be96fd3 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 01:14:12 +00:00
Evan Cheng
d807674c8b Trim include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 00:35:31 +00:00
Evan Cheng
a01b58af85 Unbreak every backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:33:11 +00:00
Evan Cheng
d5b03f252c Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:14:33 +00:00
Evan Cheng
94b01f6882 Add MCInstrInfo registeration machinery.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:29:03 +00:00
Evan Cheng
22fee2dff4 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:07:07 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 19:10:37 +00:00
Jay Foad
4f91054fe4 PR10210: New method ConstantArray::getAsCString(). Use it in LTO to
avoid getting embedded trailing null bytes in std::strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 08:24:19 +00:00
Andrew Trick
6d64a04a4d Cleanup. Fix a stupid variable name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 05:44:06 +00:00
Andrew Trick
5e7645be4c SCEVExpander: give new insts a name that identifies the reponsible pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 05:07:32 +00:00
Evan Cheng
f46e7e3d7f Remove RegClass2VRegMap from MachineRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 23:54:40 +00:00
Evan Cheng
4db3748fcf Remove RCBarriers from TargetInstrDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 23:47:21 +00:00
Evan Cheng
f10711fb8c Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 23:40:45 +00:00
Devang Patel
016c5829a5 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 22:32:04 +00:00
Evan Cheng
15993f83a4 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 21:26:13 +00:00
Owen Anderson
bea6f615ee Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133940 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 21:06:21 +00:00
Evan Cheng
2ca7f4d2f3 Rename unnecessary forward declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 19:41:39 +00:00
Nick Lewycky
99e0b2a8df Move onlyUsedByLifetimeMarkers to ValueTracking so that it can be used by other
passes as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133904 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 04:20:45 +00:00
Jakob Stoklund Olesen
f792fa90f1 Distinguish early clobber output operands from clobbered registers.
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 04:08:33 +00:00
Rafael Espindola
5b220213bf There is only one register coalescer. Merge it into the base class and
remove the analysis group.

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2011-06-26 22:34:10 +00:00
Rafael Espindola
fdf16ca44f Move RegisterCoalescer.h to lib/CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-26 21:41:06 +00:00
Michael J. Spencer
25b15777df Object: Add proper error handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25 17:55:23 +00:00
Michael J. Spencer
001c9205fc Make Binary the parent of ObjectFile and update children to new interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25 17:54:50 +00:00
Michael J. Spencer
c44c915372 Add Binary class. This is a cleaner parent than ObjectFile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25 17:54:29 +00:00
Michael J. Spencer
d2a02f409e Add Object/Error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25 17:42:56 +00:00
Nick Lewycky
3e64427cb3 Enhance the sanity check for block sizes; check that the resulting pointer is
pointing to the range [first character, last character] instead of just not
after the last character. Patch by Yan Ivnitskiy!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-25 17:08:50 +00:00
Evan Cheng
5e6b4605bd Rename TargetRegisterDesc to MCRegisterDesc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 23:44:48 +00:00
Jim Grosbach
ba8297ec08 Refactor MachO relocation generaration into the Target directories.
Move the target-specific RecordRelocation logic out of the generic MC
MachObjectWriter and into the target-specific object writers. This allows
nuking quite a bit of target knowledge from the supposedly target-independent
bits in lib/MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 23:44:37 +00:00
Devang Patel
fa3f9c001f Fix struct member's scope. Patch by Xi Wang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133828 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 22:00:39 +00:00
Devang Patel
8594d429e0 Handle debug info for i128 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 20:46:11 +00:00
Evan Cheng
f5fa52ed06 - Add MCRegisterInfo registration machinery. Also added x86 registration routines.
- Rename TargetRegisterDesc to MCRegisterDesc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133820 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 20:42:09 +00:00
Evan Cheng
a347f85dbe Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-24 01:44:41 +00:00
Jakub Staszak
66dddd1da3 Calculate backedge probability correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23 23:52:11 +00:00
Jakub Staszak
fd9533b4a3 Missing files for the BlockFrequency analysis added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23 21:56:59 +00:00
Jakub Staszak
44eb49c2a1 Introduce BlockFrequency analysis for BasicBlocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23 21:45:20 +00:00
Evan Cheng
f05589d043 Rename TargetOptions::StackAlignment to StackAlignmentOverride.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-23 18:15:47 +00:00