Rafael Espindola
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49e4415587
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handle the "mov reg1, reg2" case in isMoveInstr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-06-27 21:52:45 +00:00 |
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Rafael Espindola
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58421d7d08
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initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-06-18 00:08:07 +00:00 |
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Rafael Espindola
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dc124a234a
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implement movri
add a stub LowerFORMAL_ARGUMENTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28388 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-05-18 21:45:49 +00:00 |
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Evan Cheng
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0f3ac8d8d4
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getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-05-18 00:12:58 +00:00 |
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Rafael Espindola
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7bc59bc395
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added a skeleton of the ARM backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-05-14 22:18:28 +00:00 |
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