Owen Anderson
e85bd773e6
Attempt to provide correct encodings for a number of other vld1 variants, which we can't test
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since we can neither generate nor parse them at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 00:24:52 +00:00
Jim Grosbach
cd5391965f
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 00:16:39 +00:00
Owen Anderson
b552174a8c
Add aesthetic break.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 00:14:00 +00:00
Jim Grosbach
9a376a8003
Tweak to fix spelling and grammar in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 00:13:15 +00:00
Owen Anderson
d9aa7d30aa
Add correct NEON encodings for the "multiple single elements" form of vld.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 00:05:05 +00:00
Jakob Stoklund Olesen
8bcf7603f7
MachineLICM should not claim to be preserving the CFG when it can split critical
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edges on demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:59:55 +00:00
Jakob Stoklund Olesen
962c71089d
Be more precise about verifying missing kill flags.
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It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:59:53 +00:00
Jakob Stoklund Olesen
3d4114c464
When inserting copies during splitting, always use the parent register as the
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source, and let rewrite() clean it up.
This way, kill flags on the inserted copies are fixed as well during rewrite().
We can't just assume that all the copies we insert are going to be kills since
critical edges into loop headers sometimes require both source and dest to be
live out of a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:59:48 +00:00
Chris Lattner
e66b7ebfb4
fix computation of ambiguous instructions to not ignore the mnemonic.
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FWIW, X86 has 254 ambiguous instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:57:23 +00:00
Jim Grosbach
9af3d1c0dc
Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME
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for handling the fixup necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:45:50 +00:00
Jim Grosbach
a502423d1e
Remove unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:40:56 +00:00
Bob Wilson
665814b6be
Add support for alignment operands on VLD1-lane instructions.
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This is another part of the fix for Radar 8599955.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117976 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:40:51 +00:00
Bob Wilson
baf0615426
Add VLD1-lane testcases for quad-register types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:40:46 +00:00
Bill Wendling
cd944a424c
Missed reverting this bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:17:54 +00:00
Bill Wendling
160accad6b
Minor cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:11:22 +00:00
Chris Lattner
4c9f4e4002
give MatchableInfo::Operand a constructor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117968 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:08:02 +00:00
Chris Lattner
efd8dadb4f
rearrange a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117967 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:07:52 +00:00
Bob Wilson
b796bbb6de
Add NEON VLD1-lane instructions. Partial fix for Radar 8599955.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 22:04:05 +00:00
Jakob Stoklund Olesen
1c163d2a06
Add kill flag verification.
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At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 21:51:31 +00:00
Jakob Stoklund Olesen
79cb53ce95
Update kill flags while rewriting instructions after splitting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117959 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 21:51:29 +00:00
Bill Wendling
c2bf50245f
Move the machine operand MC encoding patterns to the parent classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 21:17:06 +00:00
Bill Wendling
933b314c76
Use ARM-style comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 21:16:39 +00:00
Owen Anderson
648b20d5db
When folding away a (shl (shr)) pair, we need to check that the bits that will BECOME the low
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bits are zero, not that the current low bits are zero. Fixes <rdar://problem/8606771>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117953 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 21:08:20 +00:00
Chris Lattner
99f535242c
use our fancy new MnemonicAlias mechanism to remove a bunch of hacks
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from X86AsmParser.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 21:06:34 +00:00
Bill Wendling
40a5eb18b0
When we look at instructions to convert to setting the 's' flag, we need to look
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at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
Jakob Stoklund Olesen
a37d5cf342
Don't assign new registers created during a split to the same stack slot, but
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give them individual stack slots once the are actually spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 19:49:57 +00:00
Jakob Stoklund Olesen
e8f0823a68
Add basic LiveStacks verification.
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When an instruction refers to a spill slot with a LiveStacks entry, check that
the spill slot is live at the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 19:49:52 +00:00
Owen Anderson
95b9766fea
Use ARM-style comment syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:33:37 +00:00
Bob Wilson
24645a1a6d
NEON does not support truncating vector stores. Radar 8598391.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:31:39 +00:00
Owen Anderson
4845f99008
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:30:39 +00:00
Owen Anderson
60b75fad7e
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:26:43 +00:00
Owen Anderson
3b5dfcd8fd
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:13:11 +00:00
Jim Grosbach
469ebbe148
Add FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:11:14 +00:00
Owen Anderson
2bcb989a0b
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:03:16 +00:00
Rafael Espindola
d1d73b03af
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 17:10:53 +00:00
Jim Grosbach
6797f89815
Add 'IsThumb' predicate to patterns marked as 'IsThumb1Only'. The latter gates
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codegen using the patterns; the latter gates the assembler recognizing the
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 17:08:58 +00:00
Rafael Espindola
c70a1d985a
Write the line info to .debug_line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117930 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 17:07:14 +00:00
Jim Grosbach
833c93c795
Mark ARM subtarget features that are available for the assembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 16:59:54 +00:00
Jim Grosbach
d4462a5a4f
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117927 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 16:44:21 +00:00
Rafael Espindola
f89671d994
Move EmitInstruction to MCObjectStreamer so that ELF and MachO can share it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 16:27:31 +00:00
Jim Grosbach
9729d2e998
The T2 extract/pack instructions are only valid in Thumb2 mode. Mark the
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patterns as such
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 15:59:52 +00:00
Rafael Espindola
cc3acee7b3
Add support for .value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 15:29:07 +00:00
Rafael Espindola
484291c273
Implement .weakref.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 14:28:48 +00:00
Bill Wendling
69661191ce
Move instruction encoding bits into the parent class and remove the temporary
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*_Encode classes. These instructions are the only ones which use those classes,
so a subclass isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 06:00:39 +00:00
Bill Wendling
504fb4fb8e
More tests to XFAIL. The arm-and-txt-peephole.ll test passes even when the
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peephole optimizer is disabled. That's not good at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:59:43 +00:00
Bill Wendling
9e7cb3d243
The testcase is now XFAILed. Sorry about the breakage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:50:55 +00:00
Bill Wendling
59707e8055
Disable because peephole is disabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:48:44 +00:00
Chris Lattner
acc473fcf9
"mov[zs]x (mem), GR16" are not ambiguous: the mem
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must be 8 bits. Support this memory form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:41:10 +00:00
Chris Lattner
b501d4f673
Implement enough of the missing instalias support to get
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aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:34:34 +00:00
Owen Anderson
b8d14a6611
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117900 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:23:58 +00:00