Commit Graph

113952 Commits

Author SHA1 Message Date
Colin LeMahieu
27eb697fea [Hexagon] Creating HexagonMCInstrInfo namespace as landing zone for static functions detached from HexagonMCInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 19:00:00 +00:00
Eric Christopher
0f842f925d Fix grammar in documentation.
Patch by Ralph Campbell!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 18:46:25 +00:00
Eric Christopher
f5bbc8ae1a Update and remove a few calls to TargetMachine::getSubtargetImpl
out of the asm printer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 18:46:23 +00:00
Kostya Serebryany
ce7a848558 [fuzzer] split main() into FuzzerDriver() that takes a callback as a parameter and a tiny main() in a separate file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 18:45:37 +00:00
Ben Langmuir
7b5766d2f6 Assume the original file is created before release in LockFileManager
This is true in clang, and let's us remove the problematic code that
waits around for the original file and then times out if it doesn't get
created in short order.  This caused any 'dead' lock file or legitimate
time out to cause a cascade of timeouts in any processes waiting on the
same lock (even if they only just showed up).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 18:22:35 +00:00
Kostya Serebryany
0b1ec08b77 [fuzzer] properly annotate fallthrough, add one more entry to FAQ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 18:21:12 +00:00
Colin LeMahieu
5a71687970 [Hexagon] Removing static variable holding MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229872 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 17:38:39 +00:00
Benjamin Kramer
c69bd70cd1 LSR: Move set instead of copying. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229871 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 17:19:43 +00:00
Sanjay Patel
4dad5f2731 add X86 load folding tests for unary math ops
X86 load folding is fragile; eg, the tests here
don't work without AVX even though they should. This
is because we have a mix of tablegen patterns that have
been added over time, and we have a load folding table
used by the peephole optimizer that has to be kept in 
sync with the ever-changing ISA and tablegen defs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229870 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 16:59:11 +00:00
Rafael Espindola
1b4da6c8ce Avoid conversion to float when creating ConstantDataArray/ConstantDataVector.
Patch by Raoux, Thomas F!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229864 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 16:08:20 +00:00
Benjamin Kramer
1ce666d86c Demote vectors to arrays. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229861 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 15:26:17 +00:00
Chandler Carruth
b7012af85f [x86] Delete still more piles of complex code now that we have a good
systematic lowering of v8i16.

This required a slight strategy shift to prefer unpack lowerings in more
places. While this isn't a cut-and-dry win in every case, it is in the
overwhelming majority. There are only a few places where the old
lowering would probably be a touch faster, and then only by a small
margin.

In some cases, this is yet another significant improvement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229859 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 15:21:57 +00:00
Chandler Carruth
c57e90422f [x86] Teach the unpack lowering how to lower with an initial unpack in
addition to lowering to trees rooted in an unpack.

This saves shuffles and or registers in many various ways, lets us
handle another class of v4i32 shuffles pre SSE4.1 without domain
crosses, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229856 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 15:06:13 +00:00
Chandler Carruth
7f583a4201 [x86] Dramatically improve v8i16 shuffle lowering by not using its
terribly complex partial blend logic.

This code path was one of the more complex and bug prone when it first
went in and it hasn't faired much better. Ultimately, with the simpler
basis for unpack lowering and support bit-math blending, this is
completely obsolete. In the worst case without this we generate
different but equivalent instructions. However, in many cases we
generate much better code. This is especially true when blends or pshufb
is available.

This does expose one (minor) weakness of the unpack lowering that I'll
try to address.

In case you were wondering, this is actually a big part of what I've
been trying to pull off in the recent string of commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229853 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 14:08:24 +00:00
Chandler Carruth
943b2ca2de [x86] Remove the final fallback in the v8i16 lowering that isn't really
needed, and significantly improve the SSSE3 path.

This makes the new strategy much more clear. If we can blend, we just go
with that. If we can't blend, we try to permute into an unpack so
that we handle cases where the unpack doing the blend also simplifies
the shuffle. If that fails and we've got SSSE3, we now call into
factored-out pshufb lowering code so that we leverage the fact that
pshufb can set up a blend for us while shuffling. This generates great
code, especially because we *know* we don't have a fast blend at this
point. Finally, we fall back on decomposing into permutes and blends
because we do at least have a bit-math-based blend if we need to use
that.

This pretty significantly improves some of the v8i16 code paths. We
never need to form pshufb for the single-input shuffles because we have
effective target-specific combines to form it there, but we were missing
its effectiveness in the blends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 13:56:49 +00:00
Chandler Carruth
c3d7858505 [x86] Simplify the pre-SSSE3 v16i8 lowering significantly by decomposing
them into permutes and a blend with the generic decomposition logic.

This works really well in almost every case and lets the code only
manage the expansion of a single input into two v8i16 vectors to perform
the actual shuffle. The blend-based merging is often much nicer than the
pack based merging that this replaces. The only place where it isn't we
end up blending between two packs when we could do a single pack. To
handle that case, just teach the v2i64 lowering to handle these blends
by digging out the operands.

With this we're down to only really random permutations that cause an
explosion of instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229849 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 13:15:12 +00:00
Chandler Carruth
3d4542ce3d [x86] Remove the insanely over-aggressive unpack lowering strategy for
v16i8 shuffles, and replace it with new facilities.

This uses precise patterns to match exact unpacks, and the new
generalized unpack lowering only when we detect a case where we will
have to shuffle both inputs anyways and they terminate in exactly
a blend.

This fixes all of the blend horrors that I uncovered by always lowering
blends through the vector shuffle lowering. It also removes *sooooo*
much of the crazy instruction sequences required for v16i8 lowering
previously. Much cleaner now.

The only "meh" aspect is that we sometimes use pshufb+pshufb+unpck when
it would be marginally nicer to use pshufb+pshufb+por. However, the
difference there is *tiny*. In many cases its a win because we re-use
the pshufb mask. In others, we get to avoid the pshufb entirely. I've
left a FIXME, but I'm dubious we can really do better than this. I'm
actually pretty happy with this lowering now.

For SSE2 this exposes some horrors that were really already there. Those
will have to fixed by changing a different path through the v16i8
lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229846 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 12:10:37 +00:00
Jozef Kolek
bb539d3b4c [mips][microMIPS] Make usage of AND16, OR16 and XOR16 by code generator
Differential Revision: http://reviews.llvm.org/D7611


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:51:32 +00:00
Chandler Carruth
71164d08b1 [x86] The SELECT x86 DAG combine also does legalization. It used to rely
on things not being marked as either custom or legal, but we now do
custom lowering of more VSELECT nodes. To cope with this, manually
replicate the legality tests here. These have to stay in sync with the
set of tests used in the custom lowering of VSELECT.

Ideally, we wouldn't do any of this combine-based-legalization when we
have an actual custom legalization step for VSELECT, but I'm not going
to be able to rewrite all of that today.

I don't have a test case for this currently, but it was found when
compiling a number of the test-suite benchmarks. I'll try to reduce
a test case and add it.

This should at least fix the test-suite fallout on build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:43:37 +00:00
Igor Laevsky
b05b70bab5 Add few simple tests to check statepoint placement for invoke instructions.
Differential Revision: http://reviews.llvm.org/D7535



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:39:04 +00:00
Michael Kuperstein
2b5910a767 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:38:11 +00:00
Igor Laevsky
05be69f1e3 Implement invoke statepoint verification.
Differential Revision: http://reviews.llvm.org/D7366



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229840 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:28:47 +00:00
Igor Laevsky
589d13e8f5 Add invoke related functionality into StatepointSite classes.
Differential Revision: http://reviews.llvm.org/D7364



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:02:11 +00:00
Elena Demikhovsky
675d06d1d0 AVX-512: Full implementation for VRNDSCALESS/SD instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 10:48:04 +00:00
Chandler Carruth
ac2b1a1bb3 [x86] Add support for bit-wise blending and use it in the v8 and v16
lowering paths. I'm going to be leveraging this to simplify a lot of the
overly complex lowering of v8 and v16 shuffles in pre-SSSE3 modes.

Sadly, this isn't profitable on v4i32 and v2i64. There, the float and
double blending instructions for pre-SSE4.1 are actually pretty good,
and we can't beat them with bit math. And once SSE4.1 comes around we
have direct blending support and this ceases to be relevant.

Also, some of the test cases look odd because the domain fixer
canonicalizes these to floating point domain. That's OK, it'll use the
integer domain when it matters and some day I may be able to update
enough of LLVM to canonicalize the other way.

This restores almost all of the regressions from teaching x86's vselect
lowering to always use vector shuffle lowering for blends. The remaining
problems are because the v16 lowering path is still doing crazy things.
I'll be re-arranging that strategy in more detail in subsequent commits
to finish recovering the performance here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229836 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 10:46:52 +00:00
Chandler Carruth
a8fb39af83 [x86,sdag] Two interrelated changes to the x86 and sdag code.
First, don't combine bit masking into vector shuffles (even ones the
target can handle) once operation legalization has taken place. Custom
legalization of vector shuffles may exist for these patterns (making the
predicate return true) but that custom legalization may in some cases
produce the exact bit math this matches. We only really want to handle
this prior to operation legalization.

However, the x86 backend, in a fit of awesome, relied on this. What it
would do is mark VSELECTs as expand, which would turn them into
arithmetic, which this would then match back into vector shuffles, which
we would then lower properly. Amazing.

Instead, the second change is to teach the x86 backend to directly form
vector shuffles from VSELECT nodes with constant conditions, and to mark
all of the vector types we support lowering blends as shuffles as custom
VSELECT lowering. We still mark the forms which actually support
variable blends as *legal* so that the custom lowering is bypassed, and
the legal lowering can even be used by the vector shuffle legalization
(yes, i know, this is confusing. but that's how the patterns are
written).

This makes the VSELECT lowering much more sensible, and in fact should
fix a bunch of bugs with it. However, as you'll see in the test cases,
right now what it does is point out the *hilarious* deficiency of the
new vector shuffle lowering when it comes to blends. Fortunately, my
very next patch fixes that. I can't submit it yet, because that patch,
somewhat obviously, forms the exact and/or pattern that the DAG combine
is matching here! Without this patch, teaching the vector shuffle
lowering to produce the right code infloops in the DAG combiner. With
this patch alone, we produce terrible code but at least lower through
the right paths. With both patches, all the regressions here should be
fixed, and a bunch of the improvements (like using 2 shufps with no
memory loads instead of 2 andps with memory loads and an orps) will
stay. Win!

There is one other change worth noting here. We had hilariously wrong
vectorization cost estimates for vselect because we fell through to the
code path that assumed all "expand" vector operations are scalarized.
However, the "expand" lowering of VSELECT is vector bit math, most
definitely not scalarized. So now we go back to the correct if horribly
naive cost of "1" for "not scalarized". If anyone wants to add actual
modeling of shuffle costs, that would be cool, but this seems an
improvement on its own. Note the removal of 16 and 32 "costs" for doing
a blend. Even in SSE2 we can blend in fewer than 16 instructions. ;] Of
course, we don't right now because of OMG bad code, but I'm going to fix
that. Next patch. I promise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 10:36:19 +00:00
Michael Kuperstein
23dd089d8f Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.

No functional change.

Differential Revision: http://reviews.llvm.org/D7065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 09:01:04 +00:00
Davide Italiano
d6f86b8614 [Support/Timer] Make GetMallocUsage() aware of jemalloc.
Differential Revision:	D7657
Reviewed by:	shankarke, majnemer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229824 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 07:27:14 +00:00
Lang Hames
668fc94ea5 [Orc][Kaleidoscope] Fix typo in tutorial comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229821 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 05:33:30 +00:00
Dmitri Gribenko
07aa3556c4 Provide the same ABI regardless of NDEBUG
For projects depending on LLVM, I find it very useful to combine a
release-no-asserts build of LLVM with a debug+asserts build of the dependent
project.  The motivation is that when developing a dependent project, you are
debugging that project itself, not LLVM.  In my usecase, a significant part of
the runtime is spent in LLVM optimization passes, so I would like to build LLVM
without assertions to get the best performance from this combination.

Currently, `lib/Support/Debug.cpp` changes the set of symbols it provides
depending on NDEBUG, while `include/llvm/Support/Debug.h` requires extra
symbols when NDEBUG is not defined.  Thus, it is not possible to enable
assertions in an external project that uses facilities of `Debug.h`.

This patch changes `Debug.cpp` and `Valgrind.cpp` to always define the symbols
that other code may depend on when #including LLVM headers without NDEBUG.

http://reviews.llvm.org/D7662



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229819 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 05:30:16 +00:00
Lang Hames
32f3cd95bb [Orc][Kaleidoscope] Make the 'fully lazy' orc kaleidoscope tutorial lazier still.
The new JIT doesn't IRGen stubs until they're referenced.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:32:43 +00:00
Lang Hames
884236fa72 [Orc] Fix a bug in the compile callback manager: trampoline ids need to be fixed
up before returning them to the available pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:31:25 +00:00
Eric Christopher
4a48ec9281 Remove the local subtarget variable from the SystemZ asm printer
and update the two calls accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229805 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:26:28 +00:00
Eric Christopher
9a6b4219e2 Remove a few more calls to TargetMachine::getSubtarget from the
R600 port.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:55 +00:00
Eric Christopher
fde0733828 Grab the subtarget off of the machine function for the R600
asm printer and clean up a bunch of uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:53 +00:00
Eric Christopher
2b8ccbf2ad Remove the DisasmEnabled AsmPrinter variable and just look it
up on the subtarget where it's set anyhow than looking it up
2-3 times in the same place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:49 +00:00
Peter Collingbourne
d93ca09fe0 MC: Remove NullStreamer hook, as it is redundant with NullTargetStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:45:07 +00:00
Peter Collingbourne
7d3b145da4 llvm-mc: Use Target::createNullStreamer to fix crashes on target-specific asm directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229798 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:45:04 +00:00
Peter Collingbourne
99a5e24d34 Introduce Target::createNullTargetStreamer and use it from IRObjectFile.
A null MCTargetStreamer allows IRObjectFile to ignore target-specific
directives. Previously we were crashing.

Differential Revision: http://reviews.llvm.org/D7711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:45:02 +00:00
Michael Gottesman
8915e014e0 [objc-arc] Introduce the concept of RCIdentity and rename all relevant functions to use that name. NFC.
The RCIdentity root ("Reference Count Identity Root") of a value V is a
dominating value U for which retaining or releasing U is equivalent to
retaining or releasing V. In other words, ARC operations on V are
equivalent to ARC operations on U.

This is a useful property to ascertain since we can use this in the ARC
optimizer to make it easier to match up ARC operations by always mapping
ARC operations to RCIdentityRoots instead of pointers themselves. Then
we perform pairing of retains, releases which are applied to the same
RCIdentityRoot.

In general, the two ways that we see RCIdentical values in ObjC are via:

  1. PointerCasts
  2. Forwarding Calls that return their argument verbatim.

As such in ObjC, two RCIdentical pointers must always point to the same
memory location.

Previously this concept was implicit in the code and various methods
that dealt with this concept were given functional names that did not
conform to any name in the "ARC" model. This often times resulted in
code that was hard for the non-ARC acquanted to understand resulting in
unhappiness and confusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:38 +00:00
Michael Gottesman
db011405b3 [objc-arc-contract] Rename contractRelease => tryToContractReleaseIntoStoreStrong.
NFC. Makes it clearer what this method is actually supposed to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:34 +00:00
Michael Gottesman
855f109cc0 [objc-arc-contract] Refactor out tryToPeepholeInstruction into its own method. NFC.
The main method of ObjCARCContract is really large and busy. By refactoring this
out, it becomes easier to reason about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:30 +00:00
Michael Gottesman
7e1c99b759 [objc-arc-contract] Reorganize the code a bit and make the debug output easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:27 +00:00
Duncan P. N. Exon Smith
eac950e408 IR: Drop scope from MDTemplateParameter
Follow-up to r229740, which removed `DITemplate*::getContext()` after my
upgrade script revealed that scopes are always `nullptr` for template
parameters.  This is the other shoe: drop `scope:` from
`MDTemplateParameter` and its two subclasses.  (Note: a bitcode upgrade
would be pointless, since the hierarchy hasn't been moved into place.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:37:21 +00:00
Eric Christopher
a3fa104c8c Avoid using a self-referential initializer and fix up uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:22:47 +00:00
Eric Christopher
b724ec6c13 80-column fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229789 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:15:33 +00:00
Eric Christopher
6ec9683959 Remove all use of is64bit off of NVPTXSubtarget and clean up code
accordingly. This changes the constructors of a number of classes
that don't need to know the subtarget's 64-bitness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229787 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:08:27 +00:00
Eric Christopher
c72978539d Remove all use of getDrvInterface off of NVPTXSubtarget and clean
up code accordingly. Delete code that was checking for all cases
of an enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:08:23 +00:00
Eric Christopher
9d2ea22e2b Migrate the NVPTX backend asm printer to a per function subtarget.
This involved moving two non-subtarget dependent features (64-bitness
and the driver interface) to the NVPTX target machine and updating
the uses (or migrating around the subtarget use for ease of review).
Otherwise use the cached subtarget or create a default subtarget
based on the TargetMachine cpu and feature string for the module
level assembler emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:08:14 +00:00
Chandler Carruth
00c954ffc4 [x86] Merge checks for a recently added test case that is the same on
all SSE variants and AVX variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229770 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 23:20:49 +00:00