Commit Graph

1055 Commits

Author SHA1 Message Date
Eric Christopher
60230ef987 Add section information for the DWARF5 split debug proposal
string offset section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171474 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-04 17:59:22 +00:00
Chandler Carruth
58a2cbef4a Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 10:22:59 +00:00
NAKAMURA Takumi
85e910fe5c llvm/MC/MCMachObjectWriter.h: ComputeSymbolTable(): Prune one description in the comment. [-Wdocumentation]
/// \param StringIndexMap [out] - Map from symbol names to offsets in the string table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171010 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24 01:24:04 +00:00
Jakob Stoklund Olesen
70fe6ecb6d Add a missing assertion, the null register has no register units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21 18:38:09 +00:00
Eli Bendersky
4766ef41b3 Aligned bundling support. Following the discussion here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-December/056754.html

The proposal and implementation are fully documented here:
https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm

Tests will follow shortly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170718 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 19:05:53 +00:00
Jim Grosbach
0eaf5a503e Fix inadvertant delete of 'has'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170713 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 18:09:48 +00:00
Roman Divacky
6af228a92a Remove MCTargetAsmLexer and its derived classes now that edis,
its only user, is gone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170699 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 14:43:30 +00:00
Jim Grosbach
46367768f7 Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 01:14:48 +00:00
Jim Grosbach
39758cd55d Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 01:14:45 +00:00
Jim Grosbach
fbf3b4a076 MC: Add MCInstrDesc::mayAffectControlFlow() method.
MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 23:38:53 +00:00
Jim Grosbach
16f3204b95 Add isSubRegisterEq() and isSuperRegisterEq().
isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 23:38:49 +00:00
Jim Grosbach
e188fb7dd9 Move isSubRegister() and isSuperRegister to MCRegisterInfo.
These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 23:38:46 +00:00
Jim Grosbach
dd2fa5195e Fix doc comment. '///' not '//'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 23:38:44 +00:00
Benjamin Kramer
28d24c95ad Remove edis remnant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170580 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 20:11:17 +00:00
Roman Divacky
759e3fa641 Remove edis - the enhanced disassembler. Fixes PR14654.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 19:55:47 +00:00
Eric Christopher
6c583141bf Add support for passing -main-file-name all the way through to
the assembler.

Part of PR14624

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170390 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 00:31:01 +00:00
Chandler Carruth
6c31d31357 Prepare LLVM to fix PR14625, exposing a hook in MCContext to manage the
compilation directory.

This defaults to the current working directory, just as it always has,
but now an assembler can choose to override it with a custom directory.
I've taught llvm-mc about this option and added a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170371 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 21:32:42 +00:00
Reed Kotler
2c3a4641a7 This patch is needed to make c++ exceptions work for mips16.
Mips16 is really a processor decoding mode (ala thumb 1) and in the same
program, mips16 and mips32 functions can exist and can call each other.

If a jal type instruction encounters an address with the lower bit set, then
the processor switches to mips16 mode (if it is not already in it). If the
lower bit is not set, then it switches to mips32 mode.

The linker knows which functions are mips16 and which are mips32.
When relocation is performed on code labels, this lower order bit is
set if the code label is a mips16 code label.

In general this works just fine, however when creating exception handling
tables and dwarf, there are cases where you don't want this lower order
bit added in.

This has been traditionally distinguished in gas assembly source by using a
different syntax for the label.

lab1:      ; this will cause the lower order bit to be added
lab2=.     ; this will not cause the lower order bit to be added

In some cases, it does not matter because in dwarf and debug tables
the difference of two labels is used and in that case the lower order
bits subtract each other out.

To fix this, I have added to mcstreamer the notion of a debuglabel.
The default is for label and debug label to be the same. So calling
EmitLabel and EmitDebugLabel produce the same result.

For various reasons, there is only one set of labels that needs to be
modified for the mips exceptions to work. These are the "$eh_func_beginXXX" 
labels.

Mips overrides the debug label suffix from ":" to "=." .

This initial patch fixes exceptions. More changes most likely
will be needed to DwarfCFException to make all of this work
for actual debugging. These changes will be to emit debug labels in some
places where a simple label is emitted now.

Some historical discussion on this from gcc can be found at:
http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170279 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 04:00:45 +00:00
Pedro Artigas
99cbdde619 Add more reset methods to make all objects that the backend may use for outputting code have a reset, some are not used but were declared for completeness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 18:52:11 +00:00
Bill Schmidt
b453e16855 This patch improves the 64-bit PowerPC InitialExec TLS support by providing
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI.  The ABI will be updated with the new code sequence.

Former sequence:

  ld 9,x@got@tprel(2)
  add 9,9,x@tls

New sequence:

  addis 9,2,x@got@tprel@ha
  ld 9,x@got@tprel@l(9)
  add 9,9,x@tls

Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 17:02:38 +00:00
Eric Christopher
05fa24c574 Remove extraneous debugging code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 03:07:28 +00:00
Eric Christopher
b1cc6f3dff Add a way of printing out an arbitrary label name for a section
given the section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 03:00:35 +00:00
Pedro Artigas
5399d2502a Make the MCStreamer have a reset method and call that after finalization of the asm printer,
also changed MCContext to a single reset only method for simplicity as requested on the list



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 22:59:46 +00:00
Eli Bendersky
d52a2c0a31 Make naming consistent, add comments and sanity asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170007 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 19:54:05 +00:00
Bill Schmidt
349c2787cf This patch implements local-dynamic TLS model support for the 64-bit
PowerPC target.  This is the last of the four models, so we now have 
full TLS support.

This is mostly a straightforward extension of the general dynamic model.
I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the
register copy following ADDI_TLSLD_L; otherwise everything above the
ADDIS_DTPREL_HA appeared dead and was removed.

As before, there are new test cases to test the assembly generation, and
the relocations output during integrated assembly.  The expected code
gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll.

There are a couple of things I think can be done more efficiently in the
overall TLS code, so there will likely be a clean-up patch forthcoming;
but for now I want to be sure the functionality is in place.

Bill


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170003 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 19:29:35 +00:00
Logan Chien
37c7461fc3 Add ARM NONE and PREL31 relocation types.
Add R_ARM_NONE and R_ARM_PREL31 relocation types
to MCExpr.  Both of them will be used while
generating .ARM.extab and .ARM.exidx sections.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169965 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 07:14:46 +00:00
Bill Schmidt
57ac1f458a This patch implements the general dynamic TLS model for 64-bit PowerPC.
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:

     Instruction                            Relocation            Symbol
  addis ra,r2,x@got@tlsgd@ha           R_PPC64_GOT_TLSGD16_HA       x
  addi  r3,ra,x@got@tlsgd@l            R_PPC64_GOT_TLSGD16_L        x
  bl __tls_get_addr(x@tlsgd)           R_PPC64_TLSGD                x
                                       R_PPC64_REL24           __tls_get_addr
  nop
  <use address in r3>

The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation.  This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr.  Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation.  So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.

Most of the code is pretty straightforward.  I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call.  Something in the 
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations.  This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().

Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.

Comments welcome!

Thanks,
Bill


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 20:30:11 +00:00
Lang Hames
07f6a4fde0 Defer call to InitSections until after MCContext has been initialized. If
InitSections is called before the MCContext is initialized it could cause
duplicate temporary symbols to be emitted later (after context initialization
resets the temporary label counter).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169785 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 22:49:11 +00:00
Eli Bendersky
f43e3fdb4f Cleanup formatting, comments and naming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169762 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 20:13:43 +00:00
Logan Chien
d32260fa90 Fix Windows build breakage.
Windows does not have <stdint.h>, should include
"llvm/Support/DataTypes.h" instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169672 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-08 05:19:49 +00:00
Eli Bendersky
550f0ade45 Make the contents of encoded sections SmallVector<char, N> instead of
SmallString. This makes it possible to use the length-erased SmallVectorImpl
in the interface without imposing buffer size. Thus, the size of MCInstFragment
is back down since a preallocated 8-byte contents buffer is enough.

It would be generally a good idea to rid all the fragments of SmallString as
contents, because a vector just makes more sense.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169644 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 22:06:56 +00:00
Eli Bendersky
64d9a32334 Refactor MCInstFragment and MCDataFragment to adhere to a common interface,
which removes code duplication and prepares the ground for future additions.

Full discussion:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121203/158233.html



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169626 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 19:13:57 +00:00
Eli Bendersky
ef76b273f9 Lift EmitAssignment into MCObjectStreamer which gets rid of at least three
duplicate implementations in format-specific streamers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169613 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 17:42:41 +00:00
Tim Northover
6eb3e87df0 Added Mapping Symbols for ARM ELF
Before this patch, when you objdump an LLVM-compiled file, objdump tried to
decode data-in-code sections as if they were code.  This patch adds the missing
Mapping Symbols, as defined by "ELF for the ARM Architecture" (ARM IHI 0044D).

Patch based on work by Greg Fitzgerald.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169609 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 16:50:23 +00:00
Logan Chien
645016533d Split MCELFStreamer into a header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169603 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 15:50:40 +00:00
Pedro Artigas
873a1dd7d6 fixed valgrind issues of prior commit, this change applies r169456 changes back to the tree with fixes. on darwin no valgrind issues exist in the tests that used to fail.
original change description:

change MCContext to work on the doInitialization/doFinalization model

reviewed by Evan Cheng <evan.cheng@apple.com>




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 22:12:44 +00:00
NAKAMURA Takumi
c7078924f0 Revert r169456, "change MCContext to work on the doInitialization/doFinalization model"
It broke many builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169462 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 02:00:13 +00:00
Pedro Artigas
486a7ad94f change MCContext to work on the doInitialization/doFinalization model
reviewed by Evan Cheng <evan.cheng@apple.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 00:50:55 +00:00
Eli Bendersky
5c10f509f4 Change std::vector to SmallVector<4> and remove some unused methods.
This is more consistent with other vectors in this code. In addition, I ran some
tests compiling a large program and >96% of fragments have 4 or less fixups, so
SmallVector<4> is a good optimization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169433 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 22:11:02 +00:00
Eli Bendersky
fa8de24030 Remove unused methods
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 20:56:39 +00:00
Eli Bendersky
a7e29c878c Remove the non-const getInst accessor. It wasn't being used, and isn't very
good for enacpsulation anyway.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169407 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 19:31:33 +00:00
Benjamin Kramer
d979153815 Try to unbreak the build on hosts that don't transitively pull in a definition for int64_t.
Also use the portable (ugly) format string macros, for MSVC compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 18:31:11 +00:00
Kevin Enderby
14ccc9007a Added a option to the disassembler to print immediates as hex.
This is for the lldb team so most of but not all of the values are
to be printed as hex with this option.  Some small values like the
scale in an X86 address were requested to printed in decimal
without the leading 0x.

There may be some tweaks need to places that may still be in
decimal that they want in hex.  Specially for arm.  I made my best
guess.  Any tweaks from here should be simple.

I also did the best I know now with help from the C++ gurus
creating the cleanest formatImm() utility function and containing
the changes.  But if someone has a better idea to make something
cleaner I'm all ears and game for changing the implementation.

rdar://8109283



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169393 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 18:13:19 +00:00
Bill Schmidt
d7802bf0dd This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF.

The patch includes code to handle external assembly and MC output with the
integrated assembler.  It intentionally does not support the "old" JIT.

For the initial-exec TLS model, the ABI requires the following to calculate
the address of external thread-local variable x:

 Code sequence            Relocation                  Symbol
  ld 9,x@got@tprel(2)      R_PPC64_GOT_TPREL16_DS      x
  add 9,9,x@tls            R_PPC64_TLS                 x

The register 9 is arbitrary here.  The linker will replace x@got@tprel
with the offset relative to the thread pointer to the generated GOT
entry for symbol x.  It will replace x@tls with the thread-pointer
register (13).

The two test cases verify correct assembly output and relocation output
as just described.

PowerPC-specific selection node variants are added for the two
instructions above:  LD_GOT_TPREL and ADD_TLS.  These are inserted
when an initial-exec global variable is encountered by
PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to
machine instructions LDgotTPREL and ADD8TLS.  LDgotTPREL is a pseudo
that uses the same LDrs support added for medium code model's LDtocL,
with a different relocation type.

The rest of the processing is straightforward.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 16:18:08 +00:00
Chandler Carruth
255f89faee Sort the #include lines for the include/... tree with the script.
AKA: Recompile *ALL* the source code!

This one went much better. No manual edits here. I spot-checked for
silliness and grep-checked for really broken edits and everything seemed
good. It all still compiles. Yell if you see something that looks goofy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 17:02:12 +00:00
Chandler Carruth
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
Eric Christopher
67587f462e Add the rest of the experimental fission sections to MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 06:47:06 +00:00
Jakob Stoklund Olesen
e26e8a64ab Add an MCPhysReg typedef to replace naked uint16_t.
Use this type for arrays of physical registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168850 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 02:39:28 +00:00
Eric Christopher
6acb53152c Add brief support for the fission .debug_info.dwo section for
ELF output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 02:49:38 +00:00
Eric Christopher
915e46fd96 Rearrange ordering of sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168762 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 02:49:32 +00:00