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Author SHA1 Message Date
Duncan Sands
4ed960061a This file was moved from Support to ADT. Correct a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 08:36:22 +00:00
Bill Wendling
9580641d5f Some minor cleanups. No functionalitical change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 07:44:07 +00:00
Bill Wendling
9a2dde3fd1 Leverage some of the code that John wrote to manage the landing pads. 
The new EH is more simple in many respects. Mainly, we don't have to worry about
the "llvm.eh.exception" and "llvm.eh.selector" calls being in weird places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 07:31:46 +00:00
Bill Wendling
7196184610 Don't add in the asked for size so that we don't copy too much from the old to new vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136338 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 07:26:41 +00:00
Nick Lewycky
297738fa95 In DenseMapInfo<pair<T, U>> tombstone key, use the tombstone for T and U instead 
of the empty key for U. This shouldn't really matter because the tombstone key
for the pair was still distinct from every other key, but it is odd. Patch by
Michael Ilseman!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 06:48:33 +00:00
Bill Wendling
e8ce880f1a Automatically merge the landingpad clauses when we come across a callee's 
landingpad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136329 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 02:40:13 +00:00
Oscar Fuentes
4ebc5916e9 Explicitly declare a library dependency of LLVM*Desc to 
LLVM*AsmPrinter.

GenLibDeps.pl fails to detect vtable references. As this is the only
referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized
builds, the algorithm that creates the list of libraries to be linked
into tools doesn't know about the dependency and sometimes places the
libraries on the wrong order, yielding error messages like this:

../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function
`llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)':
ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE
[llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo
const&)]+0x2a): undefined reference to `vtable for
llvm::ARMInstPrinter'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136328 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 02:33:52 +00:00
Oscar Fuentes
3f01f673e5 Updated cmake library dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136327 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 02:33:33 +00:00
Bill Wendling
28d735230f Make sure that the landingpad instruction takes a Constant* as the clause's value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136326 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 02:27:12 +00:00
Bill Wendling
7f66c45f35 Add a couple of convenience functions: 
* InvokeInst: Get the landingpad instruction associated with this invoke.
* LandingPadInst: A method to reserve extra space for clauses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136325 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 02:15:52 +00:00
Bruno Cardoso Lopes
15d03fb7f4 Invert the subvector insertion to be more likely to be taken as a COPY 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 01:26:53 +00:00
Bruno Cardoso Lopes
93fa4766c2 Add patterns to generate copies for extract_subvector instead of 
using vextractf128. This will reduce the number of issued instruction
for several avx codes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136323 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 01:26:50 +00:00
Bruno Cardoso Lopes
735bccda65 movd/movq write zeros in the high 128-bit part of the vector. Use 
them to match 256-bit scalar_to_vector+zext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 01:26:46 +00:00
Bruno Cardoso Lopes
a23236c360 Add a few patterns to match allzeros without having to use the fp unit. 
Take advantage that the 128-bit vpxor zeros the higher part and use it.
This also fixes PR10491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 01:26:43 +00:00
Bruno Cardoso Lopes
2e64ae4101 Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also move 
a convert pattern close to the instruction definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 01:26:39 +00:00
Benjamin Kramer
b2e7c8250b Fix a use after free. An instruction can't be both an intrinsic call and a fence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136319 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 01:20:19 +00:00
Bill Wendling
2bf84c15d2 Initial stab at getting inlining working with the EH rewrite. 
This takes the new 'resume' instruction and turns it into a direct jump to the
caller's landing pad code. The caller's landingpad instruction is merged with
the landingpad instructions of the callee. This is a bit rough and makes some
assumptions in how the code works. But it passes a simple test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136313 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 00:38:23 +00:00
Jim Grosbach
8050a61914 ARM parsing and encoding tests. 
UXTAB, UXTAB16, UXTAH, UXTB, UXTB16, and UXTH.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136312 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 00:37:03 +00:00
Argyrios Kyrtzidis
814450a429 Add an optional 'bool makeAbsolute' in llvm::sys::fs::unique_file function. 
If true and 'model' parameter is not an absolute path, a temp directory will be prepended.
Make it true by default to match current behaviour.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136310 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-28 00:29:20 +00:00
Owen Anderson
7b2958392c Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:36:57 +00:00
Evan Cheng
5de728cfe1 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:22:03 +00:00
Jim Grosbach
ed398468b5 ARM assembly parsing and encoding for USUB16 and USUB8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136289 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:10:05 +00:00
Jim Grosbach
953e2e81de ARM assembly parsing and encoding for USAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:07:00 +00:00
Kevin Enderby
c37d4bbf1f Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. 
llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136287 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:01:50 +00:00
Jim Grosbach
fc2eb31a3c Clean up tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136286 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:35:06 +00:00
Jim Grosbach
addec77b54 ARM assembly parsing and encoding support for USAT and USAT16. 
Use range checked immediate operands for instructions. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136285 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:34:17 +00:00
Jim Grosbach
5f33d13da4 ARM assembly parsing and encoding tests for USAD8 and USADA8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136284 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:23:02 +00:00
Eli Friedman
1464846801 Code generation for 'fence' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:21:52 +00:00
Jim Grosbach
144da2c8f0 ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136282 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:13:08 +00:00
Jim Grosbach
41438398c1 Fix comment copy/paste-o. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136281 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:11:41 +00:00
Jim Grosbach
29e85bc728 ARM assembly parsing and encoding tests for UQASX and UQSAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136280 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:09:30 +00:00
Jim Grosbach
24a541b79f ARM assembly parsing and encoding tests for UQADD16 and UQADD8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136279 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:08:14 +00:00
Jakub Staszak
9a24f1f070 Use BlockFrequency instead of uint32_t in BlockFrequencyInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136278 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:05:51 +00:00
Jim Grosbach
49f2ceddd2 ARM assembly parsing and encoding for UMULL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:01:42 +00:00
Devang Patel
0748f83d37 Remove outdated FIXME comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136275 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:00:01 +00:00
Jim Grosbach
71725a099e ARM assembly parsing and encoding for UMLAL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136274 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:58:11 +00:00
Jim Grosbach
2adba4156b ARM assembly parsing and encoding tests for UMAAL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136272 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:53:42 +00:00
Bill Wendling
91c56a8d8d Refuse to inline two functions which use different personality functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136269 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:44:28 +00:00
Jim Grosbach
f36b0a2ee4 ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:21:59 +00:00
Jim Grosbach
66c8982244 ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136266 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:20:45 +00:00
Jim Grosbach
fb8989e640 ARM parsing and encoding of SBFX and UBFX. 
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:09:25 +00:00
Bill Wendling
c94eefb258 Keep enums stable. Append EH stuff to the end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136263 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 21:00:28 +00:00
Jim Grosbach
b6854ad2b1 ARM assembly parsing and encoding tests for UADD16, UADD8 and UASX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136261 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:43:44 +00:00
Jim Grosbach
8b3fd56e0f ARM assembly parsing and encoding tests for TST instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136260 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:38:58 +00:00
Jim Grosbach
f1ae78af17 ARM assembly parsing and encoding tests for TEQ instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136259 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:37:36 +00:00
Owen Anderson
06470311c5 Refactor the STRT and STRBT instructions to distinguish between the register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136255 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:29:48 +00:00
Bill Wendling
772fe17a6d Merge the contents from exception-handling-rewrite to the mainline. 
This adds the new instructions 'landingpad' and 'resume'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136253 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:18:04 +00:00
Jim Grosbach
7e1547ebf7 ARM assembly parsing and encoding for extend instructions. 
Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136252 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 20:15:40 +00:00
Nick Lewycky
e511186183 Teach the ConstantMerge pass about alignment. Fixes PR10514! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 19:47:34 +00:00
Eli Friedman
84e7f7e267 X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any code, and all x86 processors will honor the required semantics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 19:43:50 +00:00