Commit Graph

7 Commits

Author SHA1 Message Date
Matt Beaumont-Gay
e33daaaaf9 Add a trivial virtual dtor to AbstractRegisterDescription to appease
-Wnon-virtual-dtor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118616 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 19:56:25 +00:00
Andrew Trick
32d9aeb1df Reverting r118604. Windows build broke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 19:47:51 +00:00
Andrew Trick
39a5ce46a5 Adds RABasic verification and tracing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 19:01:17 +00:00
Andrew Trick
e141a4960f Adds support for spilling previously allocated live intervals to
handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118423 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-08 18:02:08 +00:00
Andrew Trick
3d26d5d524 Remove the vector of live vregs. I thought we would need to track
them, but hopefully we won't. And this is not the right data structure
to do it anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:58:24 +00:00
Andrew Trick
e16eecc323 Jakob's review of the basic register allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:34:01 +00:00
Andrew Trick
14e8d71cc9 This is a prototype of an experimental register allocation
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:09:15 +00:00