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Author SHA1 Message Date
Bruno Cardoso Lopes
d29dd5ec9f Move PUNPCKLQDQ splat pattern close to the instruction definition and 
duplicate it for AVX mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139068 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:56 +00:00
Bruno Cardoso Lopes
914a2a319c Add AVX pattern versions for PSHUFB,PSIGN{B,W,D} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139067 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:54 +00:00
Bruno Cardoso Lopes
a4ac989a1c Add AVX versions of MOVZDI2PDI patterns. Use SUBREG_TO_REG to indicate 
that the AVX versions (even the 128-bit ones) all clear the upper part
of the destination register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139066 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:51 +00:00
Bruno Cardoso Lopes
152a287374 Enforce subtarget checks in a few places to be explicit when the 
pattern should be matched

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139065 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:49 +00:00
Bruno Cardoso Lopes
5ab6dcc4bb Tidy up code moving patterns to their appropriate place! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139064 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:47 +00:00
Bruno Cardoso Lopes
0e59a04849 Add AVX versions of FsMOVAPS and FsMOVAPS. Teach X86InstrInfo how to use 
it!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:45 +00:00
Bruno Cardoso Lopes
645b8be38a Teach X86FastISel to use AVX versions of instructions when possible 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139062 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:42 +00:00
Bruno Cardoso Lopes
1aab5515f6 Fix 80-column and style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139061 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:40 +00:00
Bruno Cardoso Lopes
e4ccf8a86c Tidy up some SSE/AVX convert intrinsics. Also add an AVX version of 
OptForSize pattern

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139060 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:46:38 +00:00
Owen Anderson
7ab15f6d4b Fix a truly heinous bug in DAGCombine related to AssertZext. 
If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert.  The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users.  No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem.
Fixes <rdar://problem/10063365>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139059 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:26:49 +00:00
Dan Gohman
b116142d3b Revert r129875, XFAILing this test for arm, since the fix was reverted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139058 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:14:24 +00:00
Jakob Stoklund Olesen
5047d76575 Pseudo CMOV instructions don't clobber EFLAGS. 
The explanation about a 0 argument being materialized as xor is no
longer valid.  Rematerialization will check if EFLAGS is live before
clobbering it.

The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.

This causes one less testb instruction to be generated in the cmov.ll
test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:52:55 +00:00
Jakob Stoklund Olesen
b8e052e123 Check for EFLAGS live-out before clobbering it. 
It is only allowed to clobber EFLAGS at the end of a block if it isn't
live-in to any successor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139056 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:52:52 +00:00
Jakob Stoklund Olesen
4a1b9d82a4 Use existing function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139055 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:52:49 +00:00
Jim Grosbach
83452b2064 Thumb2 parsing and encoding for CBZ/CBNZ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139054 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:46:10 +00:00
Jim Grosbach
6c3e11ea55 Thumb2 parsing and encoding for BXJ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139053 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:43:09 +00:00
Jim Grosbach
cefd2020a6 Thumb2 parsing and encoding for BIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139052 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:37:54 +00:00
Jim Grosbach
0b9a3d37c5 Thumb2 parsing and encoding for BFI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139051 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:28:46 +00:00
Jim Grosbach
7413f41d3b Thumb2 parsing and encoding for BFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139050 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:25:46 +00:00
Jim Grosbach
a110988b39 Thumb2 parsing and encoding of B instruction. 
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:22:08 +00:00
Andrew Trick
7a15a9ad97 Attempt to silence known valgrind errors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139048 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:59:34 +00:00
Jakob Stoklund Olesen
439f71eb30 Remove unused variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:41:25 +00:00
Bill Wendling
47e208bbea Try to eliminate the use of the 'unwind' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139046 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:41:11 +00:00
Eli Friedman
4136d23c48 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:33:24 +00:00
Jim Grosbach
5f25fb01b4 Thumb2 parsing and encoding for ASR. 
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:28:54 +00:00
Bill Wendling
d5941195e2 Better fix for this testcase. Update it to the new EH scheme entirely. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139039 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:27:08 +00:00
Bill Wendling
cc6927b9e1 Update for new EH stuff. (I'm not sure if this is 100% correct.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139038 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:24:17 +00:00
Andrew Trick
6984625d16 Test case update for unroll-scev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139037 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:21:03 +00:00
Andrew Trick
252ef7a61a Comment and clarifying assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139036 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:20:46 +00:00
Bill Wendling
271439053d No need to get fancy inserting a PHI node when the values are stored in stack 
slots. This fixes a bug where the number of nodes coming into the PHI node may
not equal the number of predecessors. E.g., two or more landingpad instructions
may require a PHI before reaching the eh.exception and eh.selector instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139035 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:17:08 +00:00
David Greene
011dca7fac Make RecordVal Name an Init 
Store a RecordVal's name as an Init to allow class-qualified Record
members to reference Records that have Init names.  We'll use this to
provide more programmability in how we name defs and their associated
members.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139031 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 20:12:07 +00:00
Kevin Enderby
d5705fe50d Change X86 disassembly to print immediates values as signed by default. Special 
case those instructions that the immediate is not sign-extend.  radr://8795217


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 20:01:23 +00:00
Jim Grosbach
8e0c7697fd Tidy up. Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:46:15 +00:00
Bill Wendling
9dc31e8705 Update comments to reflect reality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139023 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:43:33 +00:00
Jim Grosbach
d2990107a9 Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139022 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:43:25 +00:00
Jim Grosbach
5c1ac55542 Thumb2 parsing and encoding for AND (register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:41:35 +00:00
Jakob Stoklund Olesen
8040e06434 Simplify by using isFullCopy(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139019 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:18:29 +00:00
Bill Wendling
d199aa012b Revert r138826 until PR10834 can be fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139018 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:15:04 +00:00
Jim Grosbach
f0851e5d95 Thumb2 parsing and encoding for ADD (register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:14:46 +00:00
Duncan Sands
147272b8a7 Darwin wants ctors/dtors to be ordered the other way round to linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:07:19 +00:00
Kevin Enderby
98f213cd60 Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:03:03 +00:00
Jim Grosbach
ca52a7e38c Tests for Thumb2 AND (immediate) instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139013 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:44:27 +00:00
Jakub Staszak
9469d5cf48 Extra CHECK-NOT to make sure that GVN transform works properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139012 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:40:39 +00:00
Andrew Trick
dc07321164 -unroll-scev flag removal 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139010 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:36:14 +00:00
Andrew Trick
12d1ebe943 Enable SCEV-based unrolling by default. 
This changes loop unrolling to use the same mechanism for trip count
computation as indvars. This is a stronger check that tends to unroll
more loops. A very common side-effect is that many single iteration
loops will be removed sooner. The real goal was simply to remove
dependence on canonical IVs.

x86 is break even.
ARM performance changes to expect (+ is good):
External/SPEC/CFP2000/183.equake/183.equake +13%
SingleSource/Benchmarks/Dhrystone/fldry     +21%
MultiSource/Applications/spiff/spiff         +3%
SingleSource/Benchmarks/Stanford/Puzzle     -14%

The Puzzle regression is actually an improvement in loop optimization
that defeats GVN: rdar://problem/10065079.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139009 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:26:28 +00:00
Jim Grosbach
aca878c5e6 Add FIXME. Thumb2 ADR encoding choice is non-trivial. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139008 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:21:59 +00:00
Jakub Staszak
8370d91f1e Return undef value (instead of arbitrary) for wrong or undef index in 
ConstantVector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139007 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:01:40 +00:00
Jakub Staszak
4c6b8bee2a ConstantVector returns arbitrary value for the wrong index. 
This fixes PR10813.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139006 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 15:43:43 +00:00
Jakub Staszak
8cec759339 Compare type size instead of type _store_ size to make sure that BitCastInst 
will be valid. This fixes PR10820.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139005 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 14:57:37 +00:00
Kalle Raiskila
989621f1f8 Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 10:05:01 +00:00