Commit Graph

83446 Commits

Author SHA1 Message Date
Nuno Lopes
532516a87b fix a off-by-one bug in intersectWith(), and add a bunch of tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:59:33 +00:00
Bill Wendling
58a6cf2c62 Use the interface through DIDescriptor to get the tag/version for a debug info
MDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159317 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:41:44 +00:00
Richard Trieu
d7df6cf8d0 Silence unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:41:11 +00:00
Bill Wendling
0064851c0b Fix cmake failure from moving files around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159314 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:18:12 +00:00
Chandler Carruth
96f41a1b0f Remove 'site.exp' building from both CMake and configure+make.
This is another vestige of the DejaGNU roots. There were FIXMEs in the
lit setup to add a 'lit.site.cfg', which has been around for quite some
time now, so I've properly switched the handling of the 4 things
actually used in site.exp to go through lit.site.cfg now. No more
parsing of the .exp file, one fewer configure-style generated file,
etc., etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:16:51 +00:00
Bill Wendling
0bcbd1df7a Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h.

The reasoning is because the DebugInfo module is simply an interface to the
debug info MDNodes and has nothing to do with analysis.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:05:13 +00:00
Chandler Carruth
2378aa7ad7 Remove the last vestiges of the '-lit' and '-dg' test runner split by
removing '-lit' qualifiers from make rules. I've left a legacy
'check-local-lit' rule in case build scripts have this encoded
somewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:03:15 +00:00
Chandler Carruth
c1a0af1bd3 Remove 'check-dg', a wrapper around 'check-local-dg' which was just
nuked.

Add a comment that the 'check-lit' rule is really just a legacy of
having two test runners.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28 00:03:13 +00:00
Chandler Carruth
01e4a065ac Remove autoconf support for runtest and tclsh, some of the last vestigal
bits of DejaGNU.

Eric, you may want to remove the TCLSH bits from aclocal.m4 and
regenerate... I didn't want to touch the m4 file lest something
exploded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 23:53:41 +00:00
Chandler Carruth
4760c4bae7 Rip out legacy DejaGNU support from our Makefiles. This hasn't been the
default in forever, and hasn't even worked since most of the .exp files
were removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 23:48:39 +00:00
Chandler Carruth
34b5db4d5f LLVM-GCC is dead. Really. I promise. ;]
More importantly, these files don't even have the variable that these
lines purport to substite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 23:34:25 +00:00
Jack Carter
a6d6ef6dac This allows hello world to be compiled for Mips 64 direct object.
It takes advantage of r159299 which introduces relocation support for N64. 
elf-dump needed to be upgraded to support N64 relocations as well.

This passes make check.

Jack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159302 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 23:13:42 +00:00
Jack Carter
0140e55393 This allows hello world to be compiled for Mips 64 direct object.
It takes advantage of r159299 which introduces relocation support for N64. 
elf-dump needed to be upgraded to support N64 relocations as well.

This passes make check.

Jack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 22:48:25 +00:00
Chad Rosier
36b8fed61d Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 22:34:28 +00:00
Jack Carter
93ee286e8d The ELF relocation record format is different for N64
which many Mips 64 ABIs use than for O64 which many 
if not all other target ABIs use.

Most architectures have the following 64 bit relocation record format:

  typedef struct
  {
    Elf64_Addr   r_offset; /* Address of reference */
    Elf64_Xword  r_info;   /* Symbol index and type of relocation */
  } Elf64_Rel;

  typedef struct
  {
    Elf64_Addr    r_offset;
    Elf64_Xword   r_info;
    Elf64_Sxword  r_addend;
  } Elf64_Rela;

Whereas N64 has the following format:

  typedef struct
  {
    Elf64_Addr    r_offset;/* Address of reference */
    Elf64_Word  r_sym;     /* Symbol index */
    Elf64_Byte  r_ssym;    /* Special symbol */
    Elf64_Byte  r_type3;   /* Relocation type */
    Elf64_Byte  r_type2;   /* Relocation type */
    Elf64_Byte  r_type;    /* Relocation type */
  } Elf64_Rel;

  typedef struct
  {
    Elf64_Addr    r_offset;/* Address of reference */
    Elf64_Word  r_sym;     /* Symbol index */
    Elf64_Byte  r_ssym;    /* Special symbol */
    Elf64_Byte  r_type3;   /* Relocation type */
    Elf64_Byte  r_type2;   /* Relocation type */
    Elf64_Byte  r_type;    /* Relocation type */
    Elf64_Sxword  r_addend;
  } Elf64_Rela;

The structure is the same size, but the r_info data element 
is now 5 separate elements. Besides the content aspects, 
endian byte reordering will be different for the area with 
each element being endianized separately.

I treat this as generic and continue to pass r_type as 
an integer masking and unmasking the byte sized N64 
values for N64 mode. I've implemented this and it causes no 
affect on other current targets.

This passes make check.

Jack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 22:28:30 +00:00
Anshuman Dasgupta
e2529dc91e Refactor and speed up DFA generator.
Patch by Ivan Llopard!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 19:38:29 +00:00
Matt Beaumont-Gay
06b8c285d3 Revert r159136 due to PR13124.
Original commit message:

If a constant or a function has linkonce_odr linkage and unnamed_addr, mark it
hidden. Being linkonce_odr guarantees that it is available in every dso that
needs it. Being a constant/function with unnamed_addr guarantees that the
copies don't have to be merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159272 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 17:10:33 +00:00
Duncan Sands
f6ce8ea20c When users ask for -mcpu=help or -mattr=help, just output the help without
requiring a module.  Original patch by Sunay Ismail, simplified by Arnaud
de Grandmaison, then complicated by me (if a triple was specified on the
command line, output help for that triple, not for the default).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159268 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 16:23:48 +00:00
Duncan Sands
2d5f8ca3d1 Some reassociate optimizations create new instructions, which they insert just
before the expression root.  Any existing operators that are changed to use one
of them needs to be moved between it and the expression root, and recursively
for the operators using that one.  When I rewrote RewriteExprTree I accidentally
inverted the logic, resulting in the compacting going down from operators to
operands rather than up from operands to the operators using them, oops.  Fix
this, resolving PR12963.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 14:19:00 +00:00
Richard Barton
4acefe192f Teach assembler to handle capitalised operation values for DSB instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 09:48:23 +00:00
Chandler Carruth
b05b460330 Clean up the 'check' CMake build rule a bit, notable renaming it to
'check-llvm'.

Don't worry! 'check' still works! =] To rationalize the names of targets
used to run tests, the vague plan is the following:

make check-llvm  # run LLVM reg/unit tests  (currently 'check')
make check-clang # run Clang reg/unit tests (currently 'clang-test')
make check-rt    # run CompilerRT reg/unit tests
make check-asan  # run ASan reg/unit tests (subset of -rt)
make check-tsan  # run TSan reg/unit tests (subset of -rt)
make check-all   # run as much of the above as is available

The last one respects what projects are checked out and built for
a given tree. Personally, I would like to eventually make 'check' be an
alias for 'check-all'. For now however, it is an alias for 'check-llvm',
and thus no behavior has changed.

While this patch and my plan only really apply to CMake, I think it
might be good to similarly rationalize the naming scheme for the Make
builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 09:44:16 +00:00
Richard Barton
b69182095c Prevent ARM Assembler crashing on unrecognised assembly format for DSB instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 09:36:19 +00:00
Bill Wendling
7d85f87acb Sphinxify the exception handling doc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 07:20:57 +00:00
Akira Hatanaka
e246b52d2b Silence uninitialized variable warning in MipsISelDAGToDAG.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 00:49:46 +00:00
Akira Hatanaka
e3e12450e6 Test case for r159240.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159242 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 00:40:34 +00:00
Chandler Carruth
eb2dea2c3c Exclude both libcxx and compiler-rt until we get their CMake builds
suitable for building as a whole-project.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159241 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 00:30:08 +00:00
Akira Hatanaka
4782a6e06a Fix bug in computation of stack size in MipsFrameLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159240 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 00:20:39 +00:00
Bill Wendling
e877824edd Reduce indentation in function. Rearrange some methods. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159239 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 23:22:18 +00:00
Jim Grosbach
ef970c1091 TableGen: AsmMatcher diagnostics preference detail.
Don't override a custom diagnostic w/ a generic InvalidOperand, all else
being equal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159238 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 22:58:01 +00:00
Bill Wendling
494f8c6cfa Revamp how debugging information is emitted for debug info objects.
It's not necessary for each DI class to have its own copy of `print' and
`dump'. Instead, just give DIDescriptor those methods and have it call the
appropriate debugging printing routine based on the type of the debug
information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 22:57:33 +00:00
Evan Cheng
d096479f31 Add a missing check to avoid dereference null. No sensible test case possible. Sorry. rdar://11745134
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159236 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 22:54:59 +00:00
Evan Cheng
bbbe413846 Remove a instcombine transform that (no longer?) makes sense:
// C - zext(bool) -> bool ? C - 1 : C
    if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1))
      if (ZI->getSrcTy()->isIntegerTy(1))
        return SelectInst::Create(ZI->getOperand(0), SubOne(C), C);

This ends up forming sext i1 instructions that codegen to terrible code. e.g.
int blah(_Bool x, _Bool y) {
  return (x - y) + 1;
}
=>
        movzbl  %dil, %eax
        movzbl  %sil, %ecx
        shll    $31, %ecx
        sarl    $31, %ecx
        leal    1(%rax,%rcx), %eax
        ret


Without the rule, llvm now generates:
        movzbl  %sil, %ecx
        movzbl  %dil, %eax
        incl    %eax
        subl    %ecx, %eax
        ret

It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-).

The transformation was done as part of Eli's r75531. He has given the ok to
remove it.

rdar://11748024


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 22:03:13 +00:00
Benjamin Kramer
4750c1d804 Implement getHostCPUName for ARM/linux. This will be used to implement -march=native in clang.
The cpuid registers are only available in privileged mode so we don't have
an OS-independent way of implementing this. ARM doesn't provide a list of
processor IDs so the list is somewhat incomplete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 21:36:32 +00:00
Rafael Espindola
275c85f1a7 Fix llc's -print-before=pass and -print-after=pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 21:33:36 +00:00
Manman Ren
1f7a1b68a0 X86: add GATHER intrinsics (AVX2) in LLVM
Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256

Modified Disassembler to handle VSIB addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 19:47:59 +00:00
Tim Northover
ca578e7ba6 Teach TableGen to put chains on more instructions
When generating selection tables for Pat instances, TableGen relied on
an output Instruction's Pattern field being set to infer whether a
chain should be added.

This patch adds additional logic to check various flag fields so that
correct code can be generated even if Pattern is unset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 18:46:28 +00:00
Argyrios Kyrtzidis
da72dd2a01 Fix ThreadLocalImpl::getInstance for --disable-threads.
PR13114.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 17:13:58 +00:00
Jakob Stoklund Olesen
34f5a2b596 Allow targets to inject passes before the virtual register rewriter.
Such passes can be used to tweak the register assignments in a
target-dependent way, for example to avoid write-after-write
dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 17:09:29 +00:00
Stepan Dyatkovskiy
0e20eb496e IntegersSubsetTest: Due to compilation failure with -std=c11, replaced -1UL with NOT_A_NUMBER constant (0xffff).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159207 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 16:08:20 +00:00
Jack Carter
0518fca843 There are a number of generic inline asm operand modifiers that
up to r158925 were handled as processor specific. Making them 
generic and putting tests for these modifiers in the CodeGen/Generic
directory caused a number of targets to fail. 

This commit addresses that problem by having the targets call 
the generic routine for generic modifiers that they don't currently
have explicit code for.

For now only generic print operands 'c' and 'n' are supported.vi


Affected files:

    test/CodeGen/Generic/asm-large-immediate.ll
    lib/Target/PowerPC/PPCAsmPrinter.cpp
    lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    lib/Target/ARM/ARMAsmPrinter.cpp
    lib/Target/XCore/XCoreAsmPrinter.cpp
    lib/Target/X86/X86AsmPrinter.cpp
    lib/Target/Hexagon/HexagonAsmPrinter.cpp
    lib/Target/CellSPU/SPUAsmPrinter.cpp
    lib/Target/Sparc/SparcAsmPrinter.cpp
    lib/Target/MBlaze/MBlazeAsmPrinter.cpp
    lib/Target/Mips/MipsAsmPrinter.cpp
    
MSP430 isn't represented because it did not even run with
the long existing 'c' modifier and it was not apparent what
needs to be done to get it inline asm ready.

Contributer: Jack Carter



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 13:49:27 +00:00
Duncan Sands
91fa1da2f7 Replacing zero-sized alloca's with a null pointer is too aggressive, instead
merge all zero-sized alloca's into one, fixing c43204g from the Ada ACATS
conformance testsuite.  What happened there was that a variable sized object
was being allocated on the stack, "alloca i8, i32 %size".  It was then being
passed to another function, which tested that the address was not null (raising
an exception if it was) then manipulated %size bytes in it (load and/or store).
The optimizers cleverly managed to deduce that %size was zero (congratulations
to them, as it isn't at all obvious), which made the alloca zero size, causing
the optimizers to replace it with null, which then caused the check mentioned
above to fail, and the exception to be raised, wrongly.  Note that no loads
and stores were actually being done to the alloca (the loop that does them is
executed %size times, i.e. is not executed), only the not-null address check.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159202 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 13:39:21 +00:00
Stepan Dyatkovskiy
b787d41959 IntegersSubsetMapping: implemented "diff" operation. Operation allows at the same time perform up to three operations:
- LHS exclude RHS
- LHS intersect RHS (LHS successors will keeped)
- RHS exclude LHS
The complexity is N+M, where
  N is size of LHS
  M is size of RHS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159201 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 11:57:43 +00:00
Stepan Dyatkovskiy
0f7a7bcd48 IntegersSubsetMapping: removed exclude operation, it will replaced with more universal "diff" operation in next commit.
Changes was separated onto two commits for better readability.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 11:41:47 +00:00
Bill Wendling
d372ee265d Sphyinxify the Bugpoint document.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 11:37:00 +00:00
Elena Demikhovsky
fcb0946833 Removed unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 10:50:07 +00:00
Bill Wendling
a44489d5b5 Rename to match other X86_64* names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 10:05:06 +00:00
Elena Demikhovsky
1596373671 Shuffle optimization for AVX/AVX2.
The current patch optimizes frequently used shuffle patterns and gives these instruction sequence reduction.
Before:
      vshufps $-35, %xmm1, %xmm0, %xmm2 ## xmm2 = xmm0[1,3],xmm1[1,3]
       vpermilps       $-40, %xmm2, %xmm2 ## xmm2 = xmm2[0,2,1,3]
       vextractf128    $1, %ymm1, %xmm1
       vextractf128    $1, %ymm0, %xmm0
       vshufps $-35, %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[1,3],xmm1[1,3]
       vpermilps       $-40, %xmm0, %xmm0 ## xmm0 = xmm0[0,2,1,3]
       vinsertf128     $1, %xmm0, %ymm2, %ymm0
After:
      vshufps $13, %ymm0, %ymm1, %ymm1 ## ymm1 = ymm1[1,3],ymm0[0,0],ymm1[5,7],ymm0[4,4]
      vshufps $13, %ymm0, %ymm0, %ymm0 ## ymm0 = ymm0[1,3,0,0,5,7,4,4]
      vunpcklps       %ymm1, %ymm0, %ymm0 ## ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 08:04:10 +00:00
Chandler Carruth
c04f816afd Update a bunch of stale comments that dated from when this folled the
very first (and worst) placement algorithm. These should now more
accurately reflect the reality of the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 05:16:37 +00:00
Craig Topper
952caee4f6 Remove some duplicate instructions that exist only to given different mnemonics for the assembler. Use InstAlias instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159184 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 04:12:49 +00:00
Andrew Trick
c9b1e25493 Enable the new LoopInfo algorithm by default.
The primary advantage is that loop optimizations will be applied in a
stable order. This helps debugging and unit test creation. It is also
a better overall implementation without pathologically bad performance
on deep functions.

On large functions (llvm-stress --size=200000 | opt -loops)
Before: 0.1263s
After:  0.0225s

On deep functions (after tweaking llvm-stress, thanks Nadav):
Before: 0.2281s
After:  0.0227s

See r158790 for more comments.

The loop tree is now consistently generated in forward order, but loop
passes are applied in reverse order over the program. If we have a
loop optimization that prefers forward order, that can easily be
achieved by adding a different type of LoopPassManager.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 04:11:38 +00:00