Commit Graph

10 Commits

Author SHA1 Message Date
Bob Wilson
1c3ef90cab Add codegen support for using post-increment NEON load/store instructions.
The vld1-lane, vld1-dup and vst1-lane instructions do not yet support using
post-increment versions, but all the rest of the NEON load/store instructions
should be handled now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-07 17:43:21 +00:00
Bob Wilson
2a6e616142 Set alignment operand for NEON VST instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 23:42:37 +00:00
Bob Wilson
d4bfd54ec2 Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like
all the other LDM/STM instructions.  This fixes asm printer crashes when
compiling with -O0.  I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.

Prior to this change VLDM/VSTM used addressing mode #5, but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier.  Much of the backend
was not aware of these special cases.  The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode.  I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON.  Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 23:18:17 +00:00
Bob Wilson
7a9ef44b3b Add alignment arguments to all the NEON load/store intrinsics.
Update all the tests using those intrinsics and add support for
auto-upgrading bitcode files with the old versions of the intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 17:13:24 +00:00
Bob Wilson
02170c0034 Fix tests for Neon load/store intrinsics to match the i8* types expected by
the intrinsics.  The reason for those i8* types is that the intrinsics are
overloaded on the vector type and we don't have a way to declare an intrinsic
where one argument is an overloaded vector type and another argument is a
pointer to the vector element type.  The bitcasts added here will match what
the frontend will typically generate when these intrinsics are used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 00:17:16 +00:00
Bob Wilson
5adf60c03b Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 00:28:28 +00:00
Bob Wilson
66a70639da Add codegen support for NEON vst3 intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83484 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 20:30:08 +00:00
Dan Gohman
fce288fc91 Eliminate more uses of llvm-as and llvm-dis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:09:15 +00:00
Bob Wilson
b0abb4dc42 Use vAny type to get rid of Neon intrinsics that differed only in whether
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 05:39:44 +00:00
Bob Wilson
b36ec86c01 Implement Neon VST[234] operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-06 18:47:44 +00:00