6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-31 09:11:13 +00:00
Code Issues Projects Releases Wiki Activity
20,564 Commits 39 Branches 0 Tags 277 MiB
5476b9bfce
Commit Graph

20564 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Jim Laskey
5476b9bfce Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's 
to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23880 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-22 08:04:24 +00:00
Jim Laskey
7dc02047fb Sort the features and processor lists for the sake of search (and maintainers.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23879 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-22 07:59:56 +00:00
Chris Lattner
4245f1d790 64-bit reg support should not be enabled by default, as support isn't complete. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23878 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 22:15:43 +00:00
Chris Lattner
c8597ca698 add a case missing from the dag combiner that exposed the failure on 
2005-10-21-longlonggtu.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23875 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 21:23:25 +00:00
Chris Lattner
dabb8291e8 Instead of aborting if not a case we can handle specially, break out and 
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23874 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 21:17:10 +00:00
Chris Lattner
77a498cd7e New testcase that crashes the ppc backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23871 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 21:09:13 +00:00
Jim Laskey
f5fc2cbd6b Plugin new subtarget backend into the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 19:05:19 +00:00
Jim Laskey
4bb9cbb730 New TableGen backends for subtarget information. Only command line stuff 
active now.  Scheduling itinerary next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23869 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 19:00:04 +00:00
Chris Lattner
d2fc54edc4 silence a release mode warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23868 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 16:01:26 +00:00
Chris Lattner
09d3b75af6 add missing prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23867 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 15:49:28 +00:00
Chris Lattner
aa51a484e1 Make the coallescer a bit smarter, allowing it to join more live ranges. 
For example, we can now join things like [0-30:0)[31-40:1)[52-59:2)
with [40:60:0) if the 52-59 range is defined by a copy from the 40-60 range.
The resultant range ends up being [0-30:0)[31-60:1).

This fires a lot through-out the test suite (e.g. shrinking bc from
19492 -> 18509 machineinstrs) though most gains are smaller (e.g. about
50 copies eliminated from crafty).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23866 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 06:49:50 +00:00
Chris Lattner
9e20d352c2 Fix LiveInterval::getOverlapingRanges to take things in the right order 
(an unused method).

Fix the merger so that it can merge ranges like this  [10:12)[16:40) with
[12:38) into [10:40) instead of bogus ranges.  This sort of input will be
possible for the merger coming shortly


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23865 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 06:41:30 +00:00
Nate Begeman
ae1641c39f Match rotate. This does actually match the rotates in an rc5 cipher, but I 
haven't seen it fire on our testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23863 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 06:36:18 +00:00
Chris Lattner
63ad7963e4 My previous patch was too conservative. Reject FP and void types, but do 
allow pointer types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23859 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 05:45:41 +00:00
Nate Begeman
d5ce204c5f Don't generate operations that aren't yet supported 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23858 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 01:52:45 +00:00
Nate Begeman
0b2973aef2 Kill some now-dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23857 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 01:52:20 +00:00
Nate Begeman
4d38567689 Fix a typo in the dag combiner, so that this can work on i64 targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 01:51:45 +00:00
Andrew Lenharth
fe9234db9b byte zap not immediate goodness 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23855 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 01:24:05 +00:00
Chris Lattner
edbd8711de Make tblgen emit: 
tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23854 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 01:19:59 +00:00
Nate Begeman
405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 00:02:42 +00:00
Andrew Lenharth
1f347a318c Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23852 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 23:58:36 +00:00
Chris Lattner
eae6d648da Use a literal to define ineg instead of immzero 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23851 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 23:30:37 +00:00
Chris Lattner
cef6010c64 Fix a conditional so we don't access past the end of the range. Thanks to 
Andrew for bringing this to my attn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23850 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 22:50:10 +00:00
Andrew Lenharth
964b6aacb4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23849 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 19:39:24 +00:00
Andrew Lenharth
d684e1a64d add cttz and ctpop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23848 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 19:38:11 +00:00
Nate Begeman
c6a454e8d5 Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU 
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23846 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 17:45:03 +00:00
Chris Lattner
f75f2a0a02 don't use llabs with apparently VC++ doesn't have 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23845 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 17:01:00 +00:00
Chris Lattner
8317e12cef Fix order of eval problem from when I refactored this into a function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23844 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 16:56:40 +00:00
Andrew Lenharth
892ade722a Sounds good, finish the intop conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23843 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 14:42:48 +00:00
Nate Begeman
12a923408c Add some more patterns for i64 on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23842 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:51:08 +00:00
Chris Lattner
b0fa11ca41 add a new method, play around with some code. 
Fix a *bug* in the extendIntervalEndTo method.  In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do.  Now produce [0:30).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23841 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:39:25 +00:00
Chris Lattner
0692bbd991 add a new method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23840 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:37:59 +00:00
Chris Lattner
f5ce2678f6 Refactor some code, pulling it out into a function. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23839 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 06:06:30 +00:00
Chris Lattner
1e9f3af561 Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an 
inner loop like this:

LBB_RateConvertMono8AltiVec_2:  ; no_exit
        lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
        lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
        fmr f3, f3
        fadd f0, f2, f0
        fadd f3, f0, f3
        fcmpu cr0, f3, f1
        bge cr0, LBB_RateConvertMono8AltiVec_2  ; no_exit

to an inner loop like this:

LBB_RateConvertMono8AltiVec_1:  ; no_exit
        fsub f2, f2, f1
        fcmpu cr0, f2, f1
        fmr f0, f2
        bge cr0, LBB_RateConvertMono8AltiVec_1  ; no_exit

Doh! good catch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23838 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 04:47:10 +00:00
Chris Lattner
ae4be981b1 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23837 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 04:21:06 +00:00
Chris Lattner
d7cc4c407d simplify this a bit by using immediates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23836 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 03:57:03 +00:00
Nate Begeman
6957523b9d Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 02:15:44 +00:00
Nate Begeman
d32d4a93f6 Enable targets to say that integer divide is expensive, which will trigger 
an upcoming optimization in the DAG Combiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23834 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 02:14:14 +00:00
Andrew Lenharth
d97591a961 forgot this one 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23833 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 00:29:02 +00:00
Andrew Lenharth
4907d22a90 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23832 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 00:28:31 +00:00
John Criswell
9811ea4567 This fixes PR638: 
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23831 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 20:07:15 +00:00
Jim Laskey
538421411a Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 19:51:16 +00:00
John Criswell
3d92544261 Moved to Regression/Codegen/Generic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23829 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:52:52 +00:00
John Criswell
eb853a498f This is a generic test for all code generators. It originally came from 
Regression/Codegen/X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23826 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:51:07 +00:00
Nate Begeman
2d5aff761d Write patterns for the various shl and srl patterns that don't involve 
doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:42:01 +00:00
John Criswell
886eb39170 Force i386 code generation for an i386 specific test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23821 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:30:39 +00:00
Jim Laskey
0de8796e68 Push processor descriptions to the top of target and add command line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 13:34:52 +00:00
Chris Lattner
2f041d49a9 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23819 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:41:05 +00:00
Chris Lattner
f6cd147471 now that tblgen is smarter, use integers directly. This should help Andrew too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:32:04 +00:00
Chris Lattner
5d5a056092 Add basic support for integer constants in pattern results. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23817 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:30:56 +00:00