3144687df7
- Allow target to specify when is register pressure "too high". In most cases,
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it's too late to start backing off aggressive latency scheduling when most
of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
For ARM, this is almost always a win on # of instructions. It's runtime
neutral for most of the tests. But for some kernels with high register
pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
54 and sped up by 20%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 22:39:59 +00:00
cd20c6fb18
Use the proper type for shift counts. This fixes a bootstrap error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 21:08:12 +00:00
f83f42599d
IF directory name is empty then try to extract one using absolute file name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 20:36:13 +00:00
a4f4d699ec
DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
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are not demanded. This often allows the anyext to be folded away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 18:03:30 +00:00
7c98283f0e
Make SDNode::dump() print a newline at the end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 16:37:47 +00:00
54e1791e4b
80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 01:05:59 +00:00
134d8eec87
remove the JIT "NeedsExactSize" feature and supporting logic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 21:17:55 +00:00
481c4c0734
keep in 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 17:18:03 +00:00
96f1d8ebdd
mass elimination of reliance on automatic iterator dereferencing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109103 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 13:36:47 +00:00
a399781289
undo 80 column trespassing I caused
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 10:37:47 +00:00
89ba74d117
Re-apply r109079 with fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 06:24:48 +00:00
8b9177aee2
Revert r109079, which broke a lot of CodeGen tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 06:01:28 +00:00
c96a82a534
Initial modifications to MCAssembler and TargetMachine for the MCJIT.
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Patch by Olivier Meurant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 05:58:53 +00:00
a4081238aa
Initialize RegLimit only when register pressure is being tracked.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 05:18:41 +00:00
4a863e2c75
More register pressure aware scheduling work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 23:53:58 +00:00
917290043f
For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb
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rdar://8202967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 23:03:52 +00:00
d13db2c59c
Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 22:09:45 +00:00
1e20b96313
80 column and trailing whitespace cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 21:21:52 +00:00
872814ae04
Disallow null as a named metadata operand.
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Make MDNode::destroy private.
Fix the one thing that used MDNode::destroy, outside of MDNode itself.
One should never delete or destroy an MDNode explicitly. MDNodes
implicitly go away when there are no references to them (implementation
details aside).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 18:54:18 +00:00
5a8ea65c5c
Changed OStream templates to functions on raw_ostream, removed the unused "renderWarnings" function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109003 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 09:02:06 +00:00
4f6b4674be
Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 06:09:07 +00:00
f2c6e367c1
Change the createSpiller interface to take a MachineFunctionPass argument.
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The spillers can pluck the analyses they need from the pass reference.
Switch some never-null pointers to references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 23:50:15 +00:00
6a0dc079ef
Implement loop splitting analysis.
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Determine which loop exit blocks need a 'pre-exit' block inserted.
Recognize when this would be impossible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 21:46:58 +00:00
21d35c1399
Fix test for switch statements and increase
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threshold a bit per experimentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 21:29:12 +00:00
abff28087f
Appease the colonials.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 16:12:37 +00:00
8ae0263471
Beginning SplitKit - utility classes for live range splitting.
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This is a work in progress. So far we have some basic loop analysis to help
determine where it is useful to split a live range around a loop.
The actual loop splitting code from Splitter.cpp is also going to move in here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108842 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 15:41:07 +00:00
6089e464dd
Updated css classes for the pressure table legend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 14:35:55 +00:00
2725abd039
Oops - I tables render poorly in Chrome without this explicit height specification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 10:29:46 +00:00
f80f31eb9f
Use run-length encoding to represent identical adjacent cells in the pressure
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and interval table. Reduces output HTML file sizes by ~80% in my test cases.
Also fix access of private member type by << operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 10:18:54 +00:00
245581b1ac
Added support for turning HTML indentation on and off (indentation off by default).
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Reduces output file size ~20% on my test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108822 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 09:13:29 +00:00
c4bcc778a8
Switched to rendering after allocation (but before rewriting) in PBQP.
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Updated renderer to use allocation information from VirtRegMap (if
available) to render spilled intervals differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 07:41:44 +00:00
bf1ae5e254
Don't hoist things out of a large switch inside a
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loop, for the reasons in the comments. This is a
major win on 253.perlbmk on ARM Darwin. I expect it
to be a good heuristic in general, but it's possible
some things will regress; I'll be watching.
7940152.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 00:50:13 +00:00
0db4271069
Correct line info for declarations/definitions. Radar 8063111.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 23:56:30 +00:00
58b8176ed3
Fix memory leak reported by valgrind.
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Do not visit operands of old instruction. Visit all operands of new instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 23:25:39 +00:00
c6e59b71f5
After a custom inserter, in a block which has constant instructions,
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update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:48:56 +00:00
d70f57b254
ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:15:08 +00:00
46dcb57e18
Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
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This property will be used by the register pressure tracking instruction scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 18:47:01 +00:00
9529a1c3dd
Spillers may alter MachineLoopInfo when breaking critical edges, so make it
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non-const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 18:41:20 +00:00
8b3a6b651e
Fix PR 7662.
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Do not try to insert local variable info to a DIE used for function declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 17:53:55 +00:00
5907f4c385
Update CMake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108700 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 15:37:03 +00:00
54cc2efb4e
Render MachineFunctions to HTML pages, with options to render register
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pressure estimates and liveness alongside.
Still experimental.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108698 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 15:22:28 +00:00
54026c0f1b
Remove r108639 now that it is handled by InstCombine instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 08:10:24 +00:00
d73ada7d24
Target: Give the TargetAsmParser access to the TargetMachine.
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- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 00:33:49 +00:00
9fbb37e10d
MC: Move several clients to using AsmParser constructor function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108645 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 18:31:33 +00:00
806de357a5
Fix struct/class mismatch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108642 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 11:47:56 +00:00
3ecdfafe3b
Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions.
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I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.
This fixed <rdar://problem/8197504>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108639 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 08:47:54 +00:00
12f35c52a5
Added -pbqp-pre-coalescing flag to PBQP. If enabled this will cause PBQP to require
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LoopSplitter be run prior to register allocation.
Entirely for testing purposes at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 00:57:59 +00:00
7490896f9d
Use isPrologLabel() instead of checking the opcode directly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-17 19:18:44 +00:00
d3bb335144
update CMakeLists.txt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108620 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-17 12:12:42 +00:00
3b6702db0c
Removed unused inRange variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108618 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-17 11:43:07 +00:00
