Commit Graph

4217 Commits

Author SHA1 Message Date
Argyrios Kyrtzidis
9eddfd3687 Fix compilation for some targets other than x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70522 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:50:26 +00:00
Argyrios Kyrtzidis
a26eae64dd Make DebugLoc independent of DwarfWriter.
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:22:31 +00:00
Dan Gohman
78e04d4aa0 Set mayLoad on MOVZX32_NOREXrm8 too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 03:11:48 +00:00
Evan Cheng
8c1474050d Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 00:58:57 +00:00
Bill Wendling
98a366d547 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 23:29:43 +00:00
Nate Begeman
ec8eee2d3a Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 22:47:44 +00:00
Nate Begeman
5a5ca1519e Implement review feedback for vector shuffle work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 05:20:52 +00:00
Bill Wendling
be8cc2a3de Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 00:15:41 +00:00
Anton Korobeynikov
573c92d8ba Properly print 'P' modifier on inline asm memory operands.
This should fix PR3379 and PR4064.
Patch inspired by Edwin Török!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 21:49:33 +00:00
Bill Wendling
c69d56f115 r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 00:21:31 +00:00
Nate Begeman
9008ca6b6b 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
PR2957

ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 18:41:29 +00:00
Dan Gohman
4af325d1b4 Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H, and use these
to precisely describe the h-register subreg register classes.
Thanks to Jakob Stoklund Olesen for spotting this and for the
initial patch!

Also, make getStoreRegOpcode and getLoadRegOpcode aware of the
needs of h registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 16:41:36 +00:00
Dan Gohman
6241762c5a Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_ABCD,
GR32_ABCD, and GR64_ABCD, respectively, to help describe them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 16:33:14 +00:00
Dan Gohman
4d47b9bcb9 Break up long multi-mnemonic strings into separate lines for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 15:13:28 +00:00
Mon P Wang
a7e01d7efd Revised 68749 to allow matching of load/stores for address spaces < 256.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 07:22:10 +00:00
Chris Lattner
bc58322d6a add support for detecting process features on win64, patch by
Nicolas Capens!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 18:27:23 +00:00
Rafael Espindola
15f1b66d64 Fix PR 4004 by including the call to __tls_get_addr in X86tlsaddr. This is not
very elegant, but neither is the tls specification :-(



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:59:40 +00:00
Rafael Espindola
15684b2955 Revert 69952. Causes testsuite failures on linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:40:33 +00:00
Nate Begeman
b706d29f9c PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.

A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 03:42:54 +00:00
Dan Gohman
146a310e66 Add support for printing MO_ExternalSymbol operands in
memory operand tuples. This doesn't ever come up in normal
code however.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 00:57:37 +00:00
Duncan Sands
005e7984cc Get rid of what looks like a copy-and-pasted typo.
Spotted by gcc-4.5.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 09:44:39 +00:00
Rafael Espindola
7daa13c2a4 TLS_addr64 and TLS_addr32 define RDI and EAX. They don't use them.
This fixes PR4002.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 08:22:09 +00:00
Dan Gohman
70bc17dbf5 Make X86's copyRegToReg able to handle copies to and from subclasses.
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 22:54:34 +00:00
Bob Wilson
998e125a87 Move duplicated AddLiveIn function from X86 and ARM backends to be a method
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 18:36:57 +00:00
Mon P Wang
0bd07fc5dd Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 05:16:01 +00:00
Bill Wendling
1824773689 Recommit r69335 and r69336. These were not causing problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69394 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 22:40:38 +00:00
Rafael Espindola
2ee3db3003 For general dynamic TLS access we must use
leaq	foo@TLSGD(%rip), %rdi

as part of the instruction sequence. Using a register other than %rdi and then
copying it to %rdi is not valid.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 14:35:58 +00:00
Bill Wendling
c3a76ef955 Revert r69335 and r69336. They were causing build failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 04:19:22 +00:00
Dan Gohman
d10a4ce582 MOV8rr_NOREX is a "Move" instruction. This doesn't currently
matter, because this instruction isn't generated until after
things that care.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:45:17 +00:00
Dan Gohman
d51def353c Don't use MOV8rr_NOREX on x86-32. It doesn't actually hurt anything at
present, but it's inconsistent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69335 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:43:09 +00:00
Rafael Espindola
7c36683fa3 fix PR3995. A scale must be 1, 2, 4 or 8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 12:34:53 +00:00
Dan Gohman
df7dfc7715 Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:57 +00:00
Dan Gohman
25174963f6 Add a folding table entry for MOV8rr_NOREX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:28 +00:00
Dan Gohman
6288b93f00 Fix X86MachineFunctionInfo's doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:20:18 +00:00
Dan Gohman
aaa1fdb271 Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with
the local register allocator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:10:16 +00:00
Dan Gohman
6d9305c7fd Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
either the source or destination is a physical h register.

This fixes sqlite3 with the post-RA scheduler enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69111 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:04:23 +00:00
Dan Gohman
a2f3703efd GR8_NOREX can contain the H registers, since they don't require
REX prefixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:00:48 +00:00
Dan Gohman
62ad138d70 For the h-register addressing-mode trick, use the correct value for
any non-address uses of the address value. This fixes 186.crafty.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:45:05 +00:00
Evan Cheng
b3f5bfe37f Some of GR8_NOREX registers are only available in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 16:57:43 +00:00
Dan Gohman
88c7af096b Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 21:06:25 +00:00
Devang Patel
0f7fef3872 Reapply 68847.
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 17:02:03 +00:00
Dan Gohman
21e3dfbc86 Implement x86 h-register extract support.
- Add patterns for h-register extract, which avoids a shift and mask,
   and in some cases a temporary register.
 - Add address-mode matching for turning (X>>(8-n))&(255<<n), where
   n is a valid address-mode scale value, into an h-register extract
   and a scaled-offset address.
 - Replace X86's MOV32to32_ and related instructions with the new
   target-independent COPY_TO_SUBREG instruction.

On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.

These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 16:09:41 +00:00
Dan Gohman
8433df36fb Remove x86's special-case handling for ISD::TRUNCATE and
ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:29:31 +00:00
Dan Gohman
3cf9b3e455 Fix copy+pastos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:28:29 +00:00
Dan Gohman
ee30047386 List the l registers before h registers, for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:18:42 +00:00
Dan Gohman
3cd0aa3260 Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:14:03 +00:00
Dan Gohman
04d19f0241 Add a comment about MOVSX64rr8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:13:28 +00:00
Dan Gohman
8cc632f705 Fix another hard-coded constant to use X86AddrNumOperands.
This unbreaks the JIT on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:04:25 +00:00
Rafael Espindola
7ff5bff45e X86-64 TLS support for local exec and initial exec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 13:02:49 +00:00