Commit Graph

2857 Commits

Author SHA1 Message Date
Daniel Dunbar
5b6a4e231a build: Fix a dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02 00:45:41 +00:00
Daniel Dunbar
b7698a49c2 tests: Add an 'llvm-lit' tool (script), which gets generated as part of the
build and has the object build directory baked into it. This allows 'llvm-lit'
to properly find the information needed to run the test suite in all cases,
without requiring the user to have LLVM or 'lit' available in their PATH, for
example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110000 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02 00:39:42 +00:00
Daniel Dunbar
6647033565 lit: Allow clients to define predefined parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02 00:39:38 +00:00
Bill Wendling
1844b1a5a4 Add a "Compare" flag to the target instruction descriptor. This will be used
later to identify and possibly remove superfluous compare instructions -- those
that are testing for and setting a status flag that should already be set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 22:48:39 +00:00
Benjamin Kramer
e099eba206 Tweak suppressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 12:18:36 +00:00
Jim Grosbach
6ccfc507dc Many Thumb2 instructions can reference the full ARM register set (i.e.,
have 4 bits per register in the operand encoding), but have undefined
behavior when the operand value is 13 or 15 (SP and PC, respectively).
The trivial coalescer in linear scan sometimes will merge a copy from
SP into a subsequent instruction which uses the copy, and if that
instruction cannot legally reference SP, we get bad code such as:
  mls r0,r9,r0,sp
instead of:
  mov r2, sp
  mls r0, r9, r0, r2

This patch adds a new register class for use by Thumb2 that excludes
the problematic registers (SP and PC) and is used instead of GPR
for those operands which cannot legally reference PC or SP. The
trivial coalescer explicitly requires that the register class
of the destination for the COPY instruction contain the source
register for the COPY to be considered for coalescing. This prevents
errant instructions like that above.

PR7499




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109842 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 02:41:01 +00:00
Benjamin Kramer
432ab2a10c Supress valgrind errors from python.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109818 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-29 23:15:04 +00:00
Owen Anderson
2a5892fe66 Make un-named values legible in certain vim configurations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109772 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-29 17:57:57 +00:00
Bob Wilson
fdb530d406 Fix a warning from gcc-4.0 (from the ppc buildbot).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109605 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-28 18:21:10 +00:00
Eric Christopher
bc16827be6 Filter out patterns that have PredicateOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-28 01:52:23 +00:00
Mikhail Glushenkov
67d985ffb2 Return -1 only on failure to execute a program.
Also fix some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109499 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 11:19:36 +00:00
Eric Christopher
ecfa079206 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-26 17:53:07 +00:00
Mikhail Glushenkov
b374d4fd82 Get rid of exceptions in llvmc.
llvmc can be now compiled with llvm-gcc on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 03:42:55 +00:00
Bob Wilson
02dee5b437 Add an explicit -sdk option to xcrun command.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 23:33:00 +00:00
Daniel Dunbar
2d4590d6fb lit: Add some example tests for previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 00:40:19 +00:00
Daniel Dunbar
b937549e51 lit: Add support for 'REQUIRES: feature-one, feature-two, ...' in the
integrated-test formats (sh and tcl style). The particular features which get
recognized are up to the test suite itself to define.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 23:39:57 +00:00
Eric Christopher
07fdd897e2 Hack around extracts that aren't easy to process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 22:07:19 +00:00
Bob Wilson
273e48b53b Add support for a new Apple-style build target, EmbeddedSim, that builds
llvmCore for the iOS Simulator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 20:44:02 +00:00
Chris Lattner
444e2f530e remove option from tablegen for building static header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 19:45:21 +00:00
Bruno Cardoso Lopes
94143ee625 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 23:32:44 +00:00
Bob Wilson
4332792deb Save a copy of the unstripped libLTO.dylib in $SYM_DIR. Clean up the code
for dealing with libLTO.dylib to put it all in one place and to allow
use of DISABLE_USR_LINKS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 21:33:07 +00:00
Mikhail Glushenkov
cf95ecceba Remove code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 17:17:22 +00:00
Mikhail Glushenkov
b32d8dd592 Better error reporting for switch_list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 17:17:10 +00:00
Daniel Dunbar
54074b5f04 TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 05:44:09 +00:00
Mikhail Glushenkov
fc97aeb4e6 llvmc: Add a new option type (switch_list).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108673 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 03:16:25 +00:00
Bill Wendling
b9449d6639 Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 23:10:00 +00:00
Bill Wendling
7431beaba2 Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 22:20:36 +00:00
Bob Wilson
4bb327d03f Remove the entire docs directory from Apple-style builds.
This fixes a "usr_junk" verification failure when installing into /usr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 23:49:18 +00:00
Bob Wilson
29c8a782e1 Try to get embedded build of llvmCore to pass verification.
Simplify some things in the process.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 23:41:58 +00:00
Jakob Stoklund Olesen
a70282dcfa Silence a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 18:17:47 +00:00
Duncan Sands
3472766f9e Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 08:16:59 +00:00
Jakob Stoklund Olesen
4f8e771ae8 Replace copyRegToReg with COPY in FastISelEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 03:53:50 +00:00
Dan Gohman
84023e0fbe Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 09:00:22 +00:00
Bruno Cardoso Lopes
e86b01c153 Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:27:43 +00:00
Bob Wilson
02266e29f9 --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:37:18 +00:00
Dan Gohman
a5d4391d6d These changes should have accompanied r107943.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:59:16 +00:00
Dale Johannesen
7835f1fcdb Changes to ARM tail calls, mostly cosmetic.
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 01:18:23 +00:00
Dan Gohman
f595141525 Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 01:00:56 +00:00
Chris Lattner
9fc05227a2 Implement the major chunk of PR7195: support for 'callw'
in the integrated assembler.  Still some discussion to be
done.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 22:27:31 +00:00
Dan Gohman
eabaed26c3 Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 16:47:08 +00:00
Duncan Sands
8246adc1f0 Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts"
builds to "Release".  The default build is unchanged (optimization on,
assertions on), however it is now called Release+Asserts.  The intent
is that future LLVM releases released via llvm.org will be Release builds
in the new sense, i.e. will have assertions disabled (currently they have
assertions enabled, for a more than 20% slowdown).  This will bring them
in line with MacOS releases, which ship with assertions disabled.  It also
means that "Release" now means the same things in make and cmake builds:
cmake already disables assertions for "Release" builds AFAICS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107758 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 07:48:00 +00:00
Jakob Stoklund Olesen
a4e1ba53dd Add a new target independent COPY instruction and code to lower it.
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.

COPY is lowered to native register copies by LowerSubregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 22:29:50 +00:00
Jakob Stoklund Olesen
65766ce7df Clean up TargetOpcodes.h a bit, and limit the number of places where the full
list of predefined instructions appear. Add some consistency checks.

Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 21:44:22 +00:00
Bill Wendling
0a7e18cb23 Use -l option to remove symbols from i386.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 22:17:37 +00:00
Bill Wendling
0a1bd2abf6 Strip resulting binaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 01:08:57 +00:00
Duncan Sands
ef36d864d6 Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106834 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 09:35:33 +00:00
Bob Wilson
e9c2615b76 Change array references to match my previous change to use the public type
names for the array fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:21:19 +00:00
Bob Wilson
1ac27cf5ae Fix up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106795 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:04:30 +00:00
Bob Wilson
9969bc3d19 Use the struct tags mandated by ARM's ABI. Also use the public type names for
the array fields in these structs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:03:41 +00:00
Nico Weber
50b9efc2a8 Add support for the x86 instructions "pusha" and "popa".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00