Commit Graph

41386 Commits

Author SHA1 Message Date
Evan Cheng
5e8d9def77 Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 01:28:05 +00:00
Evan Cheng
4070e60efe Clean up the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 01:26:27 +00:00
Evan Cheng
91a23c8233 No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56378 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 00:13:45 +00:00
Evan Cheng
0333920a05 80 column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56377 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 00:13:08 +00:00
Dan Gohman
7e8ef60e3c Fix a FastISel GlobalVariable CSE bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 23:42:04 +00:00
Evan Cheng
fee2d6937c Continue after removing the current MI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56372 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 22:49:39 +00:00
Dan Gohman
2ff7fd1461 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 22:16:54 +00:00
Dale Johannesen
d6bd733534 Make earlyclobber stuff work when virtual regs
have previously been assigned conflicting physreg.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 18:52:31 +00:00
Bill Wendling
135ccbd74f Prevent warning about conversion from 64-bit to 32-bit by (yuck) casting...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 18:34:40 +00:00
Dan Gohman
015b714f29 Now that ConstantSDNode doesn't hold an APInt,
use ARG_FLAGSSDNode as the most aligned node type,
as it contains an int64_t, which is 8-byte
aligned on mingw.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 18:09:19 +00:00
Ted Kremenek
ed871805f7 Added static methods to APSInt: getMinValue and getMaxValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 18:01:14 +00:00
Evan Cheng
20580a1cf6 Re-materalized definition instructions may be dead. Whack them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 17:38:47 +00:00
Gabor Greif
6f4266506b backing out my last commit, it was not intended to go on the trunk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56349 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 15:13:20 +00:00
Gabor Greif
6c2c95d0ac first shot at removing Use::Val
untested, Use::swap() is definitely not done yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 15:03:57 +00:00
Duncan Sands
210fada2c6 Turn on the AddReadAttrs pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 14:34:36 +00:00
Duncan Sands
a01febbcc0 Add test for improvement of readonly to readnone,
and non-demotion of readnone to readonly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 09:20:05 +00:00
Duncan Sands
0cb5b37de9 Turn on these tests!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56343 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 09:16:32 +00:00
Duncan Sands
acdb2eeb45 Remove the MarkModRef pass (use AddReadAttrs instead).
Unfortunately this means removing one regression test
of GlobalsModRef because I couldn't work out how to
perform it without MarkModRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56342 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 08:23:44 +00:00
Duncan Sands
9f07a290b9 Add a new pass AddReadAttrs which works out which functions
can get the readnone/readonly attributes, and gives them it.
The plan is to remove markmodref (which did the same thing
by querying GlobalsModRef) and delete the analogous
functionality from GlobalsModRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 08:17:05 +00:00
Duncan Sands
e763f7eec2 Test the callgraph directly for the missing edge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 08:01:57 +00:00
Duncan Sands
e65d39a42c Teach -callgraph to always print the callgraph (as the
description says it does), not just when -analyze is
used as well.  This means printing to stderr, so adjust
some tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56337 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 07:57:09 +00:00
Dale Johannesen
fa48f94130 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis
and redo as linked list walk.  Logic moved into RA.
Per review feedback.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 01:02:35 +00:00
Devang Patel
4fe0fe8b49 splitLoop does not handle split condition EQ.
Fixes PR 2805


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56321 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 23:45:14 +00:00
Dan Gohman
3589308f37 Address-mode folding for X86FastISel. It's pretty basic, but it
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56320 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 23:23:44 +00:00
Bill Wendling
670ed09238 Decrementing the iterator here could be wrong if the worklist is empty after the "erase".
Thanks to Ji Young Park for the patch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56316 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 23:04:18 +00:00
Devang Patel
3d0a9a371c Try to place hoisted instructions befoe icmp instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 22:50:42 +00:00
Evan Cheng
841ee1a12b Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 22:38:47 +00:00
Dan Gohman
1fbc3cd674 Simplify this code. The FastISel class has its own TD member.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56311 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 18:26:43 +00:00
Dan Gohman
e251b1529f Don't consider instructions with implicit physical register
defs to be necessarily live.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 18:22:32 +00:00
Tanya Lattner
6a0fd93547 Upgrade doxygen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 16:32:28 +00:00
Dan Gohman
ee2e403545 Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 16:26:26 +00:00
Evan Cheng
bc4707a255 Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56303 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 07:54:21 +00:00
Evan Cheng
057d0c3535 Duh. Default to ARMCC::AL (always).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56301 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 07:28:19 +00:00
Evan Cheng
6d63a72858 Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56300 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 07:27:23 +00:00
Evan Cheng
3f7eb8eba0 Cosmetic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56299 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18 07:24:33 +00:00
Dan Gohman
b5b6ec6488 FastISel: For calls, prefer using the callee's address as a constant
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.

This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 21:18:49 +00:00
Dale Johannesen
91aac1015e Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 21:13:11 +00:00
Evan Cheng
870e4bef41 Unallocatable registers do not have live intervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 18:36:25 +00:00
Devang Patel
48fbc2d39b Do not hoist instruction above branch condition. The instruction may use branch condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56286 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 18:21:49 +00:00
Devang Patel
00622952ce Do not ignore iv uses outside the loop.
This one slipped through cracks very well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56284 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 17:53:47 +00:00
Devang Patel
442b1aa94b Fix comments, help messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56282 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 16:01:39 +00:00
Dan Gohman
59932584a8 Don't worry about clobbering physical register defs that aren't used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 15:25:49 +00:00
Evan Cheng
7fd7ca4e7f Fix addrmode1 instruction encodings; fix bx_ret encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 07:53:38 +00:00
Evan Cheng
29c57c34ef Specify instruction encoding using range list to avoid endianess issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56276 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 07:16:21 +00:00
Evan Cheng
bc95b23156 Add instruction names as comments to InstBits entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56275 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 06:29:52 +00:00
Dan Gohman
682d5a8834 Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw
up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56270 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 01:39:10 +00:00
Dan Gohman
d3ead4329e Add a new MachineInstr-level DCE pass. It is very simple, and is intended to
be used with fast-isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 00:43:24 +00:00
Bill Wendling
7795932d41 Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"
function with appropriate parameters. This allows us to support blocks on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56267 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 00:30:57 +00:00
Devang Patel
d9424edf94 Fix cut-n-pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56265 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 00:01:04 +00:00
Evan Cheng
1cd332725f When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 23:12:11 +00:00