Commit Graph

103 Commits

Author SHA1 Message Date
David Blaikie
986d76d7b3 Tidy up a few more uses of MF.getFunction()->getName().
Based on CR feedback from r162301 and Craig Topper's refactoring in r162347
here are a few other places that could use the same API (& in one instance drop
a Function.h dependency).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22 17:18:53 +00:00
Jakob Stoklund Olesen
4e6966266a Don't use getNextOperandForReg() in RAFast.
That particular optimization was probably premature anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-08 23:44:01 +00:00
Andrew Trick
1525260b3e Move RegisterClassInfo.h.
Allow targets to access this API. It's required for RegisterPressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 20:29:31 +00:00
Jakob Stoklund Olesen
396618b43a Switch all register list clients to the new MC*Iterator interface.
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 23:28:30 +00:00
Jakob Stoklund Olesen
8c70ea47fa Simplify some more getAliasSet callers.
MCRegAliasIterator can include Reg itself in the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 22:38:17 +00:00
Jakob Stoklund Olesen
6565a70970 Don't access MO reference after invalidating operand list.
This should unbreak llvm-x86_64-linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14 21:30:58 +00:00
Jakob Stoklund Olesen
4d10829e12 Fix PR12821.
RAFast must add an <imp-def> operand when it is rewriting a sub-register
def that isn't a read-modify-write.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14 21:10:25 +00:00
Andrew Trick
c0ccb8bb17 SparseSet: Add support for key-derived indexes and arbitrary key types.
This nicely handles the most common case of virtual register sets, but
also handles anticipated cases where we will map pointers to IDs.

The goal is not to develop a completely generic SparseSet
template. Instead we want to handle the expected uses within llvm
without any template antics in the client code. I'm adding a bit of
template nastiness here, and some assumption about expected usage in
order to make the client code very clean.

The expected common uses cases I'm designing for:
- integer keys that need to be reindexed, and may map to additional
  data
- densely numbered objects where we want pointer keys because no
  number->object map exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20 20:05:28 +00:00
Craig Topper
fac2598149 Use uint16_t to store instruction implicit uses and defs. Reduces static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-08 08:22:45 +00:00
Craig Topper
e4fd907e72 Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04 10:43:23 +00:00
Jakob Stoklund Olesen
91ba63d230 80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22 16:50:46 +00:00
Jakob Stoklund Olesen
a240743ad9 Use SparseSet for the RAFast live virtual register map.
This makes RAFast 4% faster, and it gets rid of the dodgy DenseMap
iteration.

This also revealed that RAFast would sometimes dereference DenseMap
iterators after erasing other elements from the map. That does seem to
work in the current DenseMap implementation, but SparseSet doesn't allow
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151111 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22 01:02:37 +00:00
Andrew Trick
19273aec44 Clear virtual registers after they are no longer referenced.
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21 04:51:23 +00:00
Jakob Stoklund Olesen
d9f0ff56a1 Transfer regmasks to MRI.
MRI keeps track of which physregs have been used. Make sure it gets
updated with all the regmask-clobbered registers.

Delete the closePhysRegsUsed() function which isn't necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17 19:07:56 +00:00
Andrew Trick
8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:36 +00:00
Andrew Trick
ab78e20ce0 Obvious unnecessary loop removal. Follow through from previous checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149398 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 18:54:19 +00:00
Andrew Trick
b3d58474c8 RAFast: Generalize the logic for return operands.
This removes implicit assumption about the form of MI coming into regalloc. In particular, it should be independent of ProcessImplicitDefs which will eventually become a standard part of coming out of SSA--unless we simply can eliminate IMPLICIT_DEF completely. Current unit tests expose this once I remove incidental pass ordering restrictions.

This is not a final fix. Just a temporary workaround until I figure out the right way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 05:55:32 +00:00
Jakob Stoklund Olesen
d9e5c764bf Freeze reserved registers before starting register allocation.
The register allocators don't currently support adding reserved
registers while they are running.  Extend the MRI API to keep track of
the set of reserved registers when register allocation started.

Target hooks like hasFP() and needsStackRealignment() can look at this
set to avoid reserving more registers during register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-05 00:26:49 +00:00
Evan Cheng
5a96b3dad2 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:15:52 +00:00
Rafael Espindola
254a13282c If a register is both an early clobber and part of a tied use, handle the use
before the clobber so that we copy the value if needed.

Fixes pr11415.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-22 06:27:18 +00:00
Devang Patel
d2df64f569 Insert modified DBG_VALUE into LiveDbgValueMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:03:58 +00:00
Jakob Stoklund Olesen
9d812a2805 Better diagnostics when inline asm fails to allocate.
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 07:17:37 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 19:10:37 +00:00
Jakob Stoklund Olesen
27ce3b96e5 Print registers by name instead of by number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 17:24:32 +00:00
Devang Patel
6f373a87cb After register is spilled there should not be any DBG_VALUE referring the same register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 23:02:36 +00:00
Devang Patel
72d9b0e4fc There could be more than one DBG_VALUE instructions for variables where all of them have offset based on one register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 22:36:03 +00:00
Jakob Stoklund Olesen
5e5ed44577 Be less aggressive about hinting in RAFast.
In particular, don't spill dirty registers only to satisfy a hint. It is
not worth it.

The attached test case provides an example where the fast allocator
would spill a register when other registers are available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13 03:26:46 +00:00
Jakob Stoklund Olesen
448ab3ab39 Avoid calling TRI->getAllocatableSet in RAFast.
When compiling a program with lots of small functions like
483.xalancbmk, this makes RAFast 11% faster.

Add some comments to clarify the difference between unallocatable and
reserved registers. It's quite subtle.

The fast register allocator depends on EFLAGS' not being allocatable on
x86. That way it can completely avoid tracking liveness, and it won't
mind when there are multiple uses of a single def.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 23:41:40 +00:00
Jakob Stoklund Olesen
5d20c3152b Use RegisterClassInfo::getOrder in RAFast.
This saves two virtual function calls and an Allocatable BitVector test,
making RAFast run 2% faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 18:35:30 +00:00
Evan Cheng
d8a1624122 Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 01:40:20 +00:00
Eric Christopher
d574bb5a6e Fix a bug where we were counting the alias sets as completely used
registers for fast allocation a different way. This has us updating
used registers only when we're using that exact register.

Fixes rdar://9207598



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18 19:26:25 +00:00
Eric Christopher
d31df87f41 Temporarily revert r129408 to see if it brings the bots back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 00:20:59 +00:00
Eric Christopher
8e98de9979 Fix a bug where we were counting the alias sets as completely used
registers for fast allocation.

Fixes rdar://9207598


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 23:23:14 +00:00
Eric Christopher
0b756349a7 Add more comments... err debug statements to the fast allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 22:17:44 +00:00
Eric Christopher
bbfc3b3098 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 00:48:08 +00:00
Nick Lewycky
c57ef56142 Mark that the return is using EAX so that we don't use it for some other
purpose. Fixes PR9080!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124903 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04 22:44:08 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
42e9c96392 Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results
when no virtual registers have been allocated.

It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that

 Map.grow(MRI.getLastVirtReg());

can be replaced with the simpler

 Map.resize(MRI.getNumVirtRegs());

This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:58:20 +00:00
Jakob Stoklund Olesen
4314268128 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 03:05:53 +00:00
Eric Christopher
f299da8ec3 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 21:35:09 +00:00
Owen Anderson
081c34b725 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:21:58 +00:00
Devang Patel
4bafda9618 Add DEBUG message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10 20:32:09 +00:00
Jim Grosbach
ee72651df4 previous patch was a little too tricky for its own good. Don't try to
overload UserInInstr. Explicitly check Allocatable. The early exit in the
condition will mean the performance impact of the extra test should be
minimal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113016 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 21:45:15 +00:00
Jim Grosbach
1f758831cb The register allocator shouldn't consider allocating reserved registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 19:28:41 +00:00
Jim Grosbach
07cb689d62 tidy up a few 80-column and trailing whitespace bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 19:16:29 +00:00
Jakob Stoklund Olesen
9d4b51b696 Ignore unallocatable registers in RegAllocFast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112632 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-31 19:54:25 +00:00
Eli Friedman
24a1182184 Delete dead comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 20:19:51 +00:00
Owen Anderson
90c579de5a Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 18:33:48 +00:00
Devang Patel
31defcf234 While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 00:26:18 +00:00
Owen Anderson
1f74590e9d Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 00:23:35 +00:00